Kandou seeks a Digital Design Engineer to drive high-speed digital circuit development for a chiplet-based AI memory fabric. You will define interfaces, perform RTL design, timing analysis, and rigorously verify blocks with close interaction across verification and analog teams.
Responsibilities include post-silicon lab bring-up, IP integration, and collaboration with customers to meet performance, area, and power targets in deep-submicron CMOS tech.
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Senior Digital Design Engineer - High-Speed SerDes & Memory in Reading employer: Kandou AI
At Kandou, we pride ourselves on being an exceptional employer that fosters innovation and collaboration in the rapidly evolving field of AI infrastructure. Our dynamic work culture encourages creativity and offers ample opportunities for professional growth, while our commitment to reducing the Total Cost of Ownership for hardware systems positions us at the forefront of technological advancement. Located in the EU/CH/UK, we provide a supportive environment where employees can thrive and contribute to groundbreaking solutions that democratise AI.
