Staff FPGA Engineer in Cambridge

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Position Overview

Provides technical leadership in the design and delivery of FPGA-based solutions within complex, security-focused systems.

Owns FPGA architecture, implementation, and integration, and contributes to system-level design and planning.

Responsibilities

• Leads the design, implementation, verification, and debug of VHDL-based FPGA solutions for new and existing products.
• Owns FPGA architectural design, including partitioning, interfaces, and performance trade-offs within system constraints.
• Drives integration of FPGA components with embedded and host software systems, ensuring robust and scalable solutions.
• Defines and structures FPGA development work, translating requirements into deliverable tasks and clear technical plans.
• Provides estimates for FPGA activities, ensuring plans are realistic, risks are understood, and dependencies are identified.
• Coordinates and balances FPGA work across engineers, aligning tasks to skill levels and supporting effective team delivery.
• Guides day-to-day execution, providing technical direction and unblocking engineers during implementation.
• Identifies and mitigates technical risks and delivery bottlenecks.
• Defines and evolves FPGA development processes, including configuration management, CI/CD, and verification practices.
• Contributes to system architecture, working with hardware, software, and product teams to define platform capabilities.
• Leads resolution of complex technical challenges (e. g. timing closure, resource optimisation, system integration).
• Mentors and develops engineers through technical guidance, design reviews, and knowledge sharing.
• Collaborates across teams to ensure alignment of FPGA deliverables with system and product objectives.
• Required Experience
• Degree (or equivalent experience) in Electronic Engineering, Computer Science, Mathematics, or related discipline.
• Demonstrated experience designing and delivering complex FPGA-based systems, including VHDL RTL design, synthesis, place & route, timing closure.
• Verification methodologies (simulation, testbenches, coverage).
• Xilinx FPGA architectures and toolchains.
• Experience translating algorithms into efficient FPGA implementations, optimised for performance, area, and power.
• Experience integrating FPGA designs into hardware/software systems, including bring-up and debugging.
• Software development experience (e. g. C or Python) to support tooling, test, or integration.
• Experience working in Linux and/or Windows development environments.
• Bonus Experience
• Xilinx So C platforms (e. g. Zynq, Versal) or Intel (Altera) FPGA architectures, including So Cs.
• Verilog/System Verilog.
• Cryptographic algorithms or secure hardware systems.
• Product compliance, certification, or regulated environments.
• Personal Attributes
• Demonstrates ownership and accountability for technical delivery.
• Applies a structured approach to planning, estimation, and execution.
• Effectively guides and develops other engineers, particularly less experienced team members.
• Maintains a hands‑on approach while operating at system and team level.
• Strong collaborator, able to influence without authority.
• Comfortable working in complex, multi‑disciplinary environments.

EEO Statement

Entrust is an EEO/AA/Disabled/Veterans Employer.

Entrust values diversity and inclusion and strives to build a diverse workforce with wide perspectives and innovative ideas.

We welcome applications from qualified individuals of all backgrounds, and we are committed to providing an accessible experience for candidates of all abilities.

If you require an accommodation, contact accessibility@entrust. com.

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