Deel is seeking a Principal Engineer to lead ASIC/SoC physical design from architecture to tape-out in Greater London. You will drive floorplanning, power planning, clocking, place-and-route, timing closure and signoff while coordinating with Architecture, RTL, Verification, DFT, STA, Package and Silicon Validation teams.
The role requires a hands-on leader with strong collaboration skills and a track record of successful full-chip tape-outs, including integration of IPs across vendors and
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SoC Physical Design Lead for Full-Chip Tape-Out employer: Deel
Deel is an exceptional employer that champions a dynamic and inclusive work culture, offering remote engineers the opportunity to thrive in a globally distributed team of 7,000 professionals across 100 countries. With a strong focus on employee growth, competitive compensation, and unique benefits such as stock grants and flexible work arrangements, Deel empowers its workforce to make a meaningful impact while enjoying the freedom of remote work. Join us in transforming global talent connections and experience a workplace that values innovation and diversity.
