Deel is seeking an EMIR / Power Integrity Engineer to join our SoC physical design team. You will lead PDN planning, IR drop analysis, EMIR verification, and signoff for advanced semiconductor designs to ensure reliable power delivery across the chip.
You will collaborate with PD, CAD, RTL, Package, and Reliability teams, automate flows with Tcl/Python, and support advanced nodes while driving ECO-based improvements toward signoff-quality designs.
#J-18808-Ljbffr
EMIR & Power Integrity Engineer for SoC Signoff employer: Deel
Deel is an exceptional employer that champions a dynamic and inclusive work culture, offering remote engineers the opportunity to thrive in a globally distributed team of 7,000 professionals across 100 countries. With a strong focus on employee growth, competitive compensation, and unique benefits such as stock grants and flexible work arrangements, Deel empowers its workforce to make a meaningful impact while enjoying the freedom of remote work. Join us in transforming global talent connections and experience a workplace that values innovation and diversity.
