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- Tasks: Develop and verify silicon in security-sensitive settings, ensuring functionality and performance.
- Company: Join zeroRISC, a pioneering startup redefining chip security and supply chain integrity.
- Benefits: Opportunities for learning, career growth, and working on cutting-edge security solutions.
- Why this job: Make a real impact in the security space while collaborating with an innovative team.
- Qualifications: Bachelor’s degree in Electrical Engineering or Computer Science; experience with verification methodologies.
- Other info: Engage with the open-source silicon community and contribute to meaningful projects.
The predicted salary is between 36000 - 60000 £ per year.
zeroRISC is redefining chip security and supply chain integrity by empowering device owners and operators in crucial sectors like silicon production, IoT, and critical infrastructure with full device ownership, control, and visibility. Led by the founders of the OpenTitan secure silicon project, zeroRISC is driving commercial adoption of high assurance software and services rooted in open silicon. Our products forge an immutable connection between hardware and software, enabling users to trust their devices no matter where they’re built or where they’re deployed.
As a zeroRISC SoC/ASIC Design Verification Engineer, you will develop, verify, and maintain silicon in security-sensitive settings, including root-of-trust technology. You will elevate and solidify zeroRISC's status as the leading provider of secure silicon IP by developing essential verification collateral. You will interact directly with zeroRISC customers to understand their requirements and deliver solutions benefitting both customer and zeroRISC alike. You will participate in the whole chip design process from architecture to tapeout and silicon validation. By engaging with the world’s premier open-source silicon community, you will support our mission of open secure silicon everywhere. We’re looking for engineers with strong design verification skills (and a long view of secure system architecture) who are also fast, flexible learners and enthusiastic about open source.
Key Responsibilities:
- Verify ASIC/SoC functionality, performance, security, and power throughout the full chip design life cycle, from test plan definition to sign-off
- Build high quality verification environments at the chip/top and block levels following engineering best practices
- Write thorough verification documentation including test plans
- Diagnose, debug, and resolve regression failures and other errors
- Achieve coverage closure
- Ensure design functionality while upholding stringent timelines in collaboration with architecture, design, software, system, and silicon validation teams as well as engineering program managers
What We’re Looking For:
- Bachelor’s degree in Electrical Engineering or Computer Science, or a related technical field or equivalent experience
- 4 years of experience with simulation-based verification methodologies and languages such as UVM and SystemVerilog or formal verification-based techniques including industry standard tools
- Experience developing and maintaining testbenches, test cases, and verification environments for simulation-based verification or formal verification environments
Preferred Qualifications (not required):
- Master’s or PhD in Electrical Engineering or Computer Science, or a related technical field or equivalent experience
- Knowledge of security ASICs or accelerators (e.g. cryptography accelerators or GPUs)
- Knowledge of computer architecture and memory subsystem architectures
- Experience verifying low power designs
- Experience with scripting languages such as Python
Why Join Us?
- Your work will directly contribute to the development of cutting‑edge security solutions, protecting critical systems in industrial and IoT environments
- As a seed‑stage startup, this role offers significant opportunities for learning and career growth
- Join a close‑knit, innovative team where you can learn, grow, and contribute to building something meaningful in the security space
SoC/ASIC Design Verification Engineer in Bristol employer: zeroRISC inc.
Contact Detail:
zeroRISC inc. Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land SoC/ASIC Design Verification Engineer in Bristol
✨Tip Number 1
Network like a pro! Get out there and connect with folks in the industry. Attend meetups, webinars, or even local tech events. You never know who might be looking for someone with your skills!
✨Tip Number 2
Show off your skills! Create a portfolio or GitHub repository showcasing your projects, especially those related to ASIC/SoC design verification. This gives potential employers a taste of what you can do.
✨Tip Number 3
Prepare for interviews by brushing up on common technical questions and scenarios related to verification methodologies. Practice explaining your thought process clearly; it’s all about showing how you think!
✨Tip Number 4
Don’t forget to apply through our website! It’s the best way to ensure your application gets seen by the right people. Plus, we love seeing candidates who are genuinely interested in joining our mission.
We think you need these skills to ace SoC/ASIC Design Verification Engineer in Bristol
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience with ASIC/SoC design verification. Use keywords from the job description to show we’re on the same page about what you bring to the table.
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Share your passion for open-source silicon and how your skills align with our mission at zeroRISC. Keep it engaging and personal.
Showcase Relevant Projects: If you've worked on any projects related to security-sensitive settings or verification methodologies, don’t hold back! Include these in your application to demonstrate your hands-on experience.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you don’t miss out on any important updates from our team!
How to prepare for a job interview at zeroRISC inc.
✨Know Your Stuff
Make sure you brush up on your knowledge of ASIC/SoC design verification methodologies, especially UVM and SystemVerilog. Be ready to discuss your past experiences with simulation-based verification and how you've tackled challenges in previous projects.
✨Understand the Company’s Mission
Familiarise yourself with zeroRISC's focus on chip security and supply chain integrity. Show genuine interest in their mission of open secure silicon and be prepared to discuss how your skills can contribute to this goal.
✨Prepare for Technical Questions
Expect technical questions that dive deep into your verification experience. Practice explaining your approach to building verification environments and how you ensure coverage closure. Use specific examples from your past work to illustrate your points.
✨Engage with the Interviewers
Don’t just wait for questions; engage with your interviewers. Ask them about their experiences at zeroRISC and how they see the future of secure silicon evolving. This shows your enthusiasm and helps build a rapport.
