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- Tasks: Ensure the correctness of complex ASIC designs and mentor junior engineers.
- Company: Join a leading semiconductor powerhouse in Edinburgh.
- Benefits: Competitive salary, RSUs, annual bonus, and flexible remote work options.
- Why this job: Be part of innovative projects and drive improvements in verification methodologies.
- Qualifications: 5+ years in design verification with strong SystemVerilog and UVM skills.
- Other info: Collaborative environment with opportunities for continuous improvement and career growth.
The predicted salary is between 36000 - 60000 £ per year.
Join a world-class semiconductor powerhouse and play a key role in cutting-edge ASIC development. I am looking for a Senior Design Verification Engineer to join a dynamic hardware development team in Edinburgh. In this role, you’ll be responsible for ensuring the functional correctness and robustness of complex digital and mixed-signal ASIC designs using advanced verification methodologies.
Key responsibilities
- Develop and execute comprehensive verification plans for complex mixed-signal ASIC designs
- Create and maintain UVM-based SystemVerilog testbenches.
- Write, debug, and execute test cases to verify functionality, performance, and corner cases
- Perform block-level and full-chip verification, including simulation, coverage analysis, and regression management
- Collaborate closely with design engineers to interpret specifications and define verification requirements
- Analyse and resolve issues discovered during verification and post-silicon validation
- Mentor junior engineers and drive improvements in verification methodologies and infrastructure
- Participate in code reviews and contribute to continuous improvement of design and verification best practices
Qualifications
- 5+ years’ experience in digital and/or mixed-signal design verification
- Strong proficiency in SystemVerilog, UVM, and leading simulation tools (e.g., Synopsys VCS, Cadence Xcelium)
- Solid understanding of digital design principles, RTL design, and ASIC development flows
- Experience with scripting languages (Python, Perl, Shell, etc.)
- Familiarity with formal verification, assertion-based verification, and coverage-driven verification techniques
- Excellent problem-solving skills and attention to detail
What’s on offer
- Competitive base salary plus RSUs and annual bonus
- A collaborative, innovative working environment
- Flexible work options – remote work may be considered for UK-based engineers with full right to work in the UK
Design Verification Engineer employer: Women Thrive Magazine
Contact Detail:
Women Thrive Magazine Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Design Verification Engineer
✨Tip Number 1
Network like a pro! Reach out to your connections in the semiconductor industry, especially those who work in design verification. A friendly chat can lead to insider info about job openings that aren't even advertised yet.
✨Tip Number 2
Show off your skills! Create a portfolio showcasing your best work in UVM-based SystemVerilog testbenches and any cool projects you've tackled. This will give potential employers a taste of what you can bring to their team.
✨Tip Number 3
Prepare for interviews by brushing up on your problem-solving skills. Be ready to tackle real-world scenarios related to ASIC design verification. Practising with mock interviews can help you feel more confident when it’s time to shine.
✨Tip Number 4
Don’t forget to apply through our website! We’ve got some fantastic opportunities waiting for talented engineers like you. Plus, it’s a great way to ensure your application gets the attention it deserves.
We think you need these skills to ace Design Verification Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the Design Verification Engineer role. Highlight your experience with SystemVerilog, UVM, and any relevant projects that showcase your skills in digital and mixed-signal design verification.
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about ASIC development and how your background aligns with our needs. Don’t forget to mention any mentoring experience you have, as we value collaboration.
Showcase Your Problem-Solving Skills: In your application, give examples of how you've tackled complex verification challenges in the past. We love seeing candidates who can think critically and resolve issues effectively, so don’t hold back!
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it shows you’re keen on joining our team!
How to prepare for a job interview at Women Thrive Magazine
✨Know Your Verification Methodologies
Make sure you brush up on advanced verification methodologies, especially UVM and SystemVerilog. Be ready to discuss how you've applied these in your previous roles, as this will show your depth of knowledge and experience.
✨Showcase Your Problem-Solving Skills
Prepare to share specific examples of challenges you've faced during verification processes. Highlight how you approached these issues, the tools you used, and the outcomes. This will demonstrate your analytical thinking and attention to detail.
✨Collaborate Like a Pro
Since collaboration with design engineers is key, think of instances where you've successfully worked in a team. Be ready to discuss how you interpreted specifications and defined verification requirements together, showcasing your teamwork skills.
✨Mentorship Matters
If you've mentored junior engineers before, be sure to mention it! Talk about how you’ve contributed to their growth and how you’ve driven improvements in verification methodologies. This shows leadership potential and a commitment to continuous improvement.
