Senior Validation Engineer in Farnborough

Our client is an innovative engineering organisation developing advanced semiconductor and communication technologies for mission-critical applications. As part of continued growth, they are seeking an experienced Senior Chip Validation Engineer to join their Chip Validation team and play a key role in the validation of next-generation high-speed integrated circuits.

What you'll be doing:

• Validate high-speed SerDes PHYs, including link bring-up, equalisation tuning, and PVT verification.
• Perform hands-on laboratory testing using equipment such as Oscilloscopes, BERTs, DCAs, VNAs, Spectrum Analysers, and PNAX.
• Conduct eye diagram analysis, jitter tolerance, stressed eye testing, and PHY parameter optimisation.
• Develop comprehensive chip and system validation plans alongside design and test engineering teams.
• Create and maintain automated test frameworks using Python (C/C++ experience also beneficial).
• Investigate and debug hardware issues, perform root cause analysis, and contribute to continuous product quality improvements.

What we're looking for:

• 8+ years' experience in chip, ASIC, or silicon validation.
• Strong knowledge of high-speed SerDes PHYs and communication interfaces.
• Hands-on experience with RF, analogue, and high-speed communication testing.
• Proficiency with Python for test automation (C/C++ advantageous).
• Experience working with laboratory test equipment such as BERTs, Oscilloscopes, VNAs, or DCAs.
• Degree in Electronic Engineering, Computer Engineering, or a related discipline.

This is a fantastic opportunity to join a highly skilled engineering team developing cutting-edge communication technologies within a collaborative and innovative environment.