Hardware Engineer Intern: FPGA/ASIC with OCaml & Hardcaml

Hardware Engineer Intern: FPGA/ASIC with OCaml & Hardcaml

Full-Time On-site
TU Berlin

Jane Street offers an internship where you will work closely with full-time engineers on real hardware design projects. You will apply programming language techniques to improve RTL design and testing using Hardcaml, OCaml, and related tools.

The program pairs interns with mentors, providing hands-on learning and exposure to our internal systems. You will contribute to FPGA or ASIC related tasks, gaining practical experience while exploring hardware design in a dynamic environment.

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TU Berlin

Contact Details:

TU Berlin Recruitment Team