Principal Digital (RTL) Design Engineer

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Client:

Onsemi

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–

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Yes

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Job Reference:

aa54a36888c9

Job Views:

7

Posted:

03.03.2025

Expiry Date:

17.04.2025

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Job Description:

Job Summary:

onsemi is seeking a self-starter to join an established team designing and verifying digital front end sub-systems of CMOS imaging sensors/ASICs. The role will involve all aspects of front end RTL design and verification, from analysis of requirements and producing design documents through coding and verification to hand off to back end synthesis and implementation teams. The ideal candidate should have experience in designing and verifying blocks at a low level for use in an ASIC environment, preferably for automotive applications.

Performance Objectives:

• Digital design using RTL coding, block and top-level digital verification, digital constraints, synthesis, ATPG, STA, etc.
• Expert understanding of SystemVerilog and RTL design and verification.
• Coding skills in Tcl/Perl/Python scripting and Verilog/SystemVerilog RTL.
• Experience in working and maintaining design processes.

Added Value:

• Knowledge of CMOS image sensors.
• Appreciation of designing for the automotive ADAS market.
• Ability to work without direction and guidance. Support remote design teams as required. Lead improvements in process and quality.

Requirements:

• Electronics/computing Bachelor’s/Master’s degree.
• Fluency in written and oral communication in the English language.
• Digital emphasis: Knowledge of the System Verilog language, digital circuit design experience (state machines, control logic, digital filters, memory interfaces), digital verification experience (randomized testing, code coverage, independent verification). Knowledge of UVM is a plus. Logic synthesis, DFT, ATPG, and STA skills are a plus. Knowledge of Linux and some scripting languages (Perl, Python, shell, Tcl).

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