Design Verification Engineer

Design Verification Engineer – Berkshire

This is an opportunity for a Design Verification Engineer to join an innovative environment and an organisation making changes in the technology sector.

The Design Verification Engineer will join a team developing high-performance, low-power signal processing solutions in audio, voice, and haptics, delivering innovative end-user experiences and solving difficult challenges for new generations of mobile and consumer devices.

You will join the team in Berkshire and will take ownership of all aspects of digital verification for complete IC developments, work on complex verification subsystems, and contribute towards improvements in methodology.

Responsibilities

1. Definition of IC verification plan linking product requirements through to detailed test cases
2. Leading teams of verification engineers to deliver thoroughly verified ICs
3. Create reliable and reusable testbench for complex subsystems and ICs
4. Participate in verification Specialist Groups and contribute to the digital verification methodology discussions
5. Hands-on project design/verification involvement

Required Skills and Qualifications

• Metric-driven verification – verification planning, requirements extraction – Directed and constrained random verification – Functional and code coverage analysis
• SystemVerilog
• Testbench design with verification frameworks like UVM/OVM, e, VMM
• Debugging skills – RTL – Testbench, OOP – Gate level (including SDF)
• Formal verification and verification qualification techniques
• Scripting experience with Ruby, sh/csh, TCL, Make, Perl – advantageous

This is a hybrid on-site position and will follow a 2+ day in-office work schedule, with in-office days based on business needs and team preference. You must be based within a commutable distance or be willing to relocate.

On offer is a competitive base salary, bonus scheme, and stock options.

For more information, please contact Rachel Mason.

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