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- Tasks: Join a team to implement cutting-edge GPU technology from RTL to GDSII.
- Company: Work with a leading tech company in advanced semiconductor IP.
- Benefits: Competitive pay based on skills, plus opportunities for growth and collaboration.
- Why this job: Be part of an innovative project that pushes the limits of technology and performance.
- Qualifications: Experience in physical design, scripting, and low-power techniques is essential.
- Other info: This is a contract role located in Cambridge, ideal for tech enthusiasts.
The predicted salary is between 36000 - 60000 ÂŁ per year.
1 week ago Be among the first 25 applicants
This range is provided by The ONE Group Ltd. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
Base pay range
Direct message the job poster from The ONE Group Ltd
Role: Physical Design Engineer (RTL to GDSII)
Location: Cambridge
My client, a leading technology company working on advanced semiconductor IP, is looking for an experienced Physical Design Engineer to support the development of cutting-edge GPU technology. This is a hands-on implementation role, taking high-performance blocks from RTL through to STA, with a focus on pushing the limits of power, performance, and area (PPA) at advanced process nodes.
You’ll be part of a collaborative project team, working closely with RTL designers and tool vendors to optimise flow and meet aggressive delivery milestones.
Key Responsibilities:
- Full physical implementation from RTL to GDSII, including synthesis, floorplanning, place & route, and timing closure
- Run equivalence checking (LEC), CLP, and drive constraint development and UPF debug
- Provide structured RTL feedback via Jira and direct communication to improve PPA
- Collaborate with tool vendors to debug and optimise EDA tool performance
- Independently plan, schedule, and report on progress across multiple milestones
Key Skills & Tools:
- Synopsys: Fusion Compiler, Formality
- Strong scripting skills (TCL, Python, Perl) for flow automation
- Experience with low-power techniques (e.g., power gating, DVFS)
- Prior experience on advanced nodes (N3P/N2P) highly desirable
Keywords:
RTL, STA, Physical Design, PnR, Cadence Genus, Innovus, Tempus, Synopsys Fusion, LEC, CLP, Low Power, UPF, Scripting, Python, Contract, Inside IR35, Cambridge
Seniority level
-
Seniority level
Mid-Senior level
Employment type
-
Employment type
Contract
Job function
-
Job function
Information Technology
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Industries
Semiconductor Manufacturing and Technology, Information and Media
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Physical Design Engineer employer: The ONE Group Ltd
Contact Detail:
The ONE Group Ltd Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Physical Design Engineer
✨Tip Number 1
Familiarise yourself with the specific tools mentioned in the job description, such as Synopsys Fusion Compiler and Cadence Innovus. Having hands-on experience or even a solid understanding of these tools can set you apart from other candidates.
✨Tip Number 2
Network with professionals in the semiconductor industry, especially those who work with GPU technology. Engaging in conversations on platforms like LinkedIn can help you gain insights and potentially get referrals for the position.
✨Tip Number 3
Showcase your scripting skills in TCL, Python, or Perl during discussions or interviews. Being able to demonstrate how you've used these languages for flow automation in past projects can highlight your technical capabilities.
✨Tip Number 4
Prepare to discuss low-power techniques and your experience with advanced nodes. Understanding concepts like power gating and DVFS will be crucial, so brush up on these topics to impress during your interview.
We think you need these skills to ace Physical Design Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights relevant experience in physical design, particularly with RTL to GDSII processes. Emphasise your skills with tools like Synopsys Fusion Compiler and scripting languages such as Python and TCL.
Craft a Strong Cover Letter: In your cover letter, express your enthusiasm for the role and the company. Mention specific projects or experiences that align with the job description, especially your hands-on implementation experience and collaboration with RTL designers.
Showcase Relevant Projects: Include details of any significant projects you've worked on that demonstrate your ability to optimise power, performance, and area (PPA). Highlight your experience with advanced process nodes and low-power techniques.
Proofread and Edit: Before submitting your application, carefully proofread your documents for any errors or typos. A polished application reflects your attention to detail, which is crucial in engineering roles.
How to prepare for a job interview at The ONE Group Ltd
✨Showcase Your Technical Skills
Be prepared to discuss your experience with tools like Synopsys Fusion Compiler and Cadence Innovus. Highlight specific projects where you implemented physical design from RTL to GDSII, focusing on your contributions to power, performance, and area (PPA) optimisation.
✨Demonstrate Problem-Solving Abilities
Expect to face technical questions that assess your problem-solving skills. Prepare examples of how you've tackled challenges in previous roles, particularly in timing closure or EDA tool optimisation, and be ready to explain your thought process.
✨Emphasise Collaboration Experience
Since the role involves working closely with RTL designers and tool vendors, share experiences that demonstrate your ability to collaborate effectively. Discuss how you’ve communicated feedback and worked within a team to meet tight deadlines.
✨Prepare for Scripting Questions
Given the importance of scripting in this role, brush up on your TCL, Python, and Perl skills. Be ready to discuss how you've used these languages for flow automation and any specific scripts you've developed to improve processes.
