Ultra-Low Latency C++ Engineer with FPGA Trading in London

Ultra-Low Latency C++ Engineer with FPGA Trading in London

London Full-Time On-site
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JPMorganChase in London seeks an Ultra Low Latency C++ Lead Software Engineer within the Electronic Trading Technology team to design, build, and operate market gateway solutions with FPGA acceleration. You will collaborate with hardware and software teams to achieve deterministic performance and high reliability in production trading systems.

Responsibilities include leading latency optimization, developing across Unix/Linux, and ensuring observability and resiliency.

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Contact Details:

Testing Site - JPMC Recruitment Team