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Senior IC Package Design Engineer in Paisley
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Technical Futures.
Senior IC Package Design Engineer

Senior IC Package Design Engineer in Paisley

Paisley Full-Time No home office possible
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A Senior Package Design Engineer with extensive hands-on experience using Cadence APD/Allegro tools, experience with Ansys/AutoCAD and SI/PI Simulation tools will join a thriving Semiconductor scale-up enabling the build of scalable, energy efficient AI systems Worldwide.

The Senior Package Design Engineer will undertake all package design activities with cross functional team collaboration delive…

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Contact Detail:

Technical Futures. Recruiting Team

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Senior IC Package Design Engineer in Paisley
Technical Futures.
Location: Paisley

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