Triage Lead in Warwick

At Tata Technologies we make product development dreams a reality by designing, engineering and validating the products of tomorrow for the world’s leading manufacturers. We are recruiting for a Triage Lead to be based at our office in Warwick.

Our Embedded Systems Solutions department (ESS) encompasses all activities outlined under the Automotive SPICE (ASPICE) process framework, including systems engineering, software engineering, coding, and all levels of functional testing. ESS also integrates supporting processes such as project management, risk assessment, functional safety, and cybersecurity, ensuring compliance with ASPICE standards and delivering reliable, secure, and high-quality embedded systems & solutions.

The Role:

We are looking for a highly skilled High-Voltage Battery Management System Engineer with extensive hands-on experience in HIL testing, BMCM (Battery Measurement & Control Modules), and test execution triaging. This role is responsible for ensuring high-quality validation of HV battery systems by performing system-level analysis, test triage, and early-stage fault identification (L0/L1 analysis) across automated test environments. The ideal candidate is an industry-experienced systems engineer who understands HV battery architectures, contactor logic, safety mechanisms, measurement chains, and HIL test bench operation.

Area of Responsibility:

• HV System Testing: Interpret, review, and validate HV BMS system requirements across functional domains (cell monitoring, contactor control, diagnostic strategies, thermal management, SOC/SOH algorithms).
• Define test coverage, behaviours, and expected outputs for BMS safety and control functions.
• Ensure the BMS operates safely under all test conditions and failure scenarios (OV/UV, OT/UT, OC/SC, insulation faults).
• BMCM & HIL Rig Expertise: Voltage/current measurement channels, fault insertion units; cell simulators & pack simulation, Contactor & pre-charge path emulation; HV & LV safety interlocks, validate I/O correctness, scaling, timing, and synchronization between the HIL, BMCM, and ECU under test.
• Troubleshoot HIL issues such as incorrect sensor emulation, measurement drift/noise, timing issues in restbus simulation, hardware faults or wiring problems.
• Author and own Design Verification Plans (DVPs) covering LV and HV BMS functionality, safety goals, and system requirements.
• Build and maintain traceability matrices linking system requirements, safety requirements, and FMEA items to test cases and verification evidence.
• Coordinate DVP previews with systems, software, hardware, and safety engineering teams and drive milestone sign-off.
• Revise DVPs continuously in response to design changes, software releases, and field-reported issues.
• Identify, reproduce, and document defects in Jira with complete context: test environment, software build, hardware configuration, steps to reproduce, logs, scope, and severity classification.
• Lead issue triage sessions—assess root cause, assign ownership, set priority, and track resolution across engineering teams.
• Conduct re-verification testing on bug fixes and document closure evidence in Jira and test reports.
• Generate Jira-based dashboards and metrics (open/closed by severity, defect aging, component heatmaps) for program leadership reviews.
• Integrate Jira issue workflow with Agile sprint planning, backlog grooming, and release gates.
• Present V&V status, blocking issues, and risk mitigations at program reviews and engineering gate reviews.

Knowledge / Experience:

• Bachelor's or Master’s degree in Electrical Engineering, Electronics & Communication, Mechatronics, Automotive Engineering, or a closely related field.
• HV architecture (modules, cells, pack topology), Contactor logic, pre-charge, discharge path isolation monitoring, protection circuits, current/voltage/temperature sensing principles.
• HVIL, contactor control, pre-charge circuits, and grounding architecture.
• Skilled at debugging real-time simulation fidelity issues, timing overruns, and signal integrity problems.
• Strong hands-on experience with HIL platforms (dSPACE, NI PXI, Vector VT, or BMCM rigs).
• Experience analyzing log files, signals, and BMS events during automated HIL test execution. Ability to triage complex failures and identify root causes quickly.
• Experience leading triage meetings, assigning priorities, and managing defect backlogs to closure within program timelines.

Benefits:

• Pension Scheme – We match employee contribution up to 5% of salary
• Tata Jaguar Land Rover Privilege Scheme - up to 20% off new JLR vehicles
• Health Assured – Employee Assistance Program
• Health Shield – Private Health Cash Plan

If you are passionate about bringing innovation to the projects you work on and want to join a global company, then this is the place for you. Tata Technologies: Engineering a better world.

Thank you to all applicants for your interest. We will contact only candidates under consideration. If you do not hear from us within 10 working days following the closing date, it means your application was not successful. We will retain your details for suitable future opportunities.