Lead Digital Design Engineer - Automotive Networking

Lead Digital Design Engineer - Automotive Networking

Full-Time 60000 - 80000 Β£ / year (est.) No working from home possible
Talanto

At a Glance

  • Tasks: Lead the design of in-vehicle networking transceivers and mentor junior engineers.
  • Company: NXP Semiconductors, a leader in automotive technology.
  • Benefits: Competitive salary, career development, and a chance to work on innovative projects.
  • Other info: Join a dynamic team with opportunities for growth and innovation.
  • Why this job: Make a real impact in automotive networking and shape the future of driving.
  • Qualifications: Experience in digital design and proficiency in SystemVerilog or VHDL.

The predicted salary is between 60000 - 80000 Β£ per year.

NXP Semiconductors in the United Kingdom seeks a Principal Digital Design Engineer (Automotive) to lead the design and implementation of in-vehicle networking transceivers, focusing on area, power, timing, and functional safety.

You will drive block architecture and mentor junior engineers to ensure timely, high-quality automotive products. You will define requirements, coordinate with verification, DV, and validation teams, and deliver robust designs using SystemVerilog or VHDL, collaborating.

Lead Digital Design Engineer - Automotive Networking employer: Talanto

Almedia is an exceptional employer that fosters a dynamic and innovative work culture, perfect for those passionate about machine learning and real-time personalization. With a strong emphasis on employee growth, you will have the opportunity to mentor fellow engineers while collaborating with cross-functional teams in the vibrant city of London. The hybrid working arrangements and commitment to impactful projects make Almedia a rewarding place to advance your career in AdTech.

Talanto

Contact Details:

Talanto Recruitment Team

We think you need these skills to ace Lead Digital Design Engineer - Automotive Networking

Digital Design Engineering
Automotive Networking
SystemVerilog
VHDL
Block Architecture
Functional Safety
Power Management