Synopsys, Inc. is seeking an experienced ASIC Digital Design Engineer to drive RTL design and verification for complex blocks and systems.
You will collaborate with Analog, physical design, and applications engineering to ensure integration and performance meet demanding specifications. You will develop comprehensive test plans, optimize performance and power with advanced EDA methodologies, and mentor junior engineers while staying current with industry trends to deliver high-quality, reliable
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Senior ASIC RTL Design & Verification Engineer in Reading employer: Synopsys Inc
At Synopsys, Inc., we pride ourselves on being an exceptional employer that fosters a dynamic and inclusive work culture. Our commitment to employee growth is evident through tailored development programs and opportunities for collaboration across diverse teams in a fast-paced environment. Located in a vibrant region, we offer a unique blend of strategic influence and hands-on execution, making it an ideal place for those looking to make a meaningful impact while advancing their careers.
