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- Tasks: Join our team to design and verify FPGA solutions for aerospace systems.
- Company: Stirling Dynamics specializes in innovative electro-mechanical products for Aerospace & Defence.
- Benefits: Enjoy a competitive salary, hybrid working model, and fun social events throughout the year.
- Why this job: Be part of cutting-edge greenfield development for Electric Vertical Take Off and Landing Aircraft.
- Qualifications: Degree in Electronic Engineering or similar; experience with VHDL/SystemVerilog and FPGA tools required.
- Other info: Opportunity for occasional travel to client sites and collaboration with a dynamic multi-discipline team.
The predicted salary is between 28800 - 48000 £ per year.
Overview
Stirling Dynamics are recruiting a Senior FPGA Engineer to join the Software & Electronic Hardware team.
Are you up for the technical challenge of greenfield FPGA development?
Due to recent contract wins and supporting continued growth, Stirling Dynamics are looking for a talented and experienced Senior FPGA Verification Engineer to join our team delivering FPGA based solutions for electro-mechanical products, projects, and services to the world’s leading Aerospace & Defence companies. This role is to fill a position in the dynamic multi-discipline team developing electro-mechanical based systems for Electric Vertical Take Off and Landing Aircraft (EVTOL). You must be up for the technical challenge of greenfield development!
The role is based in our Bristol office with occasional travel to our clients’ sites as required, however, as part of our commitment to flexible working, employees can work a hybrid working model.
Responsibilities
- The successful candidate will join a team responsible for the design and verification of FPGA solutions for safety critical and high integrity aerospace systems.
- They will collaborate closely with other teams in the electronics domain.
- The level and scope of responsibilities will be dependent on the successful candidates’ knowledge and experience.
Qualifications
Candidates will ideally be degree qualified in Electronic Engineering or similar.
Essential skills
Skills and experience should include most of the following:
- RTL verification using either VHDL or SystemVerilog
- FPGA simulation tools such as Questasim
- Simulation based verification using UVM/System Verilog or a similar methodology
- Conducting code and documentation reviews
- Using revision control tools, for example, git
- Scripting experience for FPGA verification
Desired skills
- Working on D0-254 development projects
Benefits
Competitive Package – Grade 4 – 6, £36,000 – £60,000 dependent on experience.
We offer a range of benefits to our employees to recognise their efforts. Playing hard is equally as important as working hard, so regular events are held throughout the year which provide an ideal opportunity to mix socially.
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Senior FPGA Verification Engineer employer: Stirling Dynamics
Contact Detail:
Stirling Dynamics Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior FPGA Verification Engineer
✨Tip Number 1
Make sure to showcase your experience with RTL verification using VHDL or SystemVerilog. Highlight specific projects where you've successfully implemented these skills, as this will resonate well with the hiring team.
✨Tip Number 2
Familiarize yourself with the latest FPGA simulation tools like Questasim. If you have hands-on experience, be ready to discuss how you've utilized these tools in past projects during your interview.
✨Tip Number 3
Since collaboration is key in this role, prepare examples of how you've worked effectively within multi-discipline teams. This will demonstrate your ability to integrate and communicate with other engineering domains.
✨Tip Number 4
If you have experience with D0-254 development projects, make sure to mention it. This knowledge is highly relevant and can set you apart from other candidates who may not have this specific experience.
We think you need these skills to ace Senior FPGA Verification Engineer
Some tips for your application 🫡
Understand the Role: Make sure to thoroughly read the job description for the Senior FPGA Verification Engineer position. Understand the key responsibilities and required skills, especially in RTL verification and FPGA simulation tools.
Tailor Your CV: Customize your CV to highlight relevant experience in FPGA development, verification methodologies like UVM/System Verilog, and any specific projects that align with the aerospace and defense sectors.
Craft a Compelling Cover Letter: Write a cover letter that showcases your passion for greenfield FPGA development and your ability to work in a multi-discipline team. Mention any relevant projects or experiences that demonstrate your fit for the role.
Highlight Technical Skills: In your application, emphasize your technical skills such as scripting for FPGA verification, using revision control tools like git, and any experience with D0-254 development projects. This will help you stand out as a qualified candidate.
How to prepare for a job interview at Stirling Dynamics
✨Showcase Your Technical Skills
Be prepared to discuss your experience with RTL verification using VHDL or SystemVerilog. Highlight specific projects where you successfully implemented FPGA solutions, especially in safety-critical environments.
✨Demonstrate Collaboration Experience
Since the role involves working closely with multi-discipline teams, share examples of how you've effectively collaborated with other engineers or teams in past projects. This will show your ability to work in a team-oriented environment.
✨Familiarize Yourself with UVM/System Verilog
Make sure you understand simulation-based verification methodologies like UVM/System Verilog. Be ready to explain how you've applied these methodologies in your previous roles and the impact they had on project outcomes.
✨Prepare for Behavioral Questions
Expect questions about how you handle challenges and setbacks in projects. Prepare anecdotes that demonstrate your problem-solving skills and resilience, particularly in the context of greenfield development.
