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- Tasks: Design high-performance IP for next-gen FPGA/Adaptive SoC technologies and collaborate with top engineering teams.
- Company: Join Tata Consultancy Services, a leading transformation company with innovative projects.
- Benefits: Remote work, diverse environment, and opportunities for professional growth.
- Why this job: Shape the future of technology while expanding your technical skills in a dynamic role.
- Qualifications: Expertise in System Verilog RTL and hands-on experience with advanced technologies.
- Other info: 6-month contract with potential for extension based on performance.
The predicted salary is between 36000 - 60000 £ per year.
Location: Belfast, UK (Remote)
Job Type: Contract (Inside IR35)
Duration: 6 months, with the potential for extension based on project needs and performance
Job Summary: Join Tata Consultancy Services (TCS) as a Senior IP Design Engineer and play a key role in designing high-performance IP for next-generation FPGA/Adaptive SoC technologies. Work remotely on impactful projects that help shape the future of FPGA and SoC design, collaborating with top-tier engineering teams and expanding your technical horizons.
About the Company: TCS is a leading transformation company partnering with some of the world's biggest brands. At TCS, you'll be part of innovative, challenging projects that drive real impact and support your professional growth in a diverse, inclusive environment.
Key Responsibilities:
- Design high-performance IP targeting FPGA/Adaptive SoC technology using System Verilog RTL.
- Deliver synthesis-ready designs that meet timing and integration requirements.
- Collaborate with engineering teams to ensure quality and performance targets are met.
Skills, Experience, and Abilities Required:
- Expertise in System Verilog RTL design
- Hands-on experience with 100Gb Ethernet, PCIe Gen5, AMBA/AXI
- In-depth knowledge of FPGA/Adaptive SoC design flow, including place & route (P&R) and timing closure
- Proficiency in Vivado/Vitis
- Strong scripting skills in Python and Tcl
- Experience with Git and CI/CD
Additional Information:
Remote role: No regular office attendance required.
Senior IP Design Engineer in Telford employer: Stackstudio Digital Ltd.
Contact Detail:
Stackstudio Digital Ltd. Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior IP Design Engineer in Telford
✨Tip Number 1
Network like a pro! Reach out to your connections in the industry, especially those who work at TCS or similar companies. A friendly chat can sometimes lead to insider info about job openings or even a referral.
✨Tip Number 2
Show off your skills! Prepare a portfolio or a GitHub repository showcasing your projects, especially those involving System Verilog RTL and FPGA design. This gives potential employers a tangible look at what you can do.
✨Tip Number 3
Ace the interview! Research common interview questions for Senior IP Design Engineers and practice your answers. Be ready to discuss your experience with 100Gb Ethernet and PCIe Gen5, as well as your scripting skills in Python and Tcl.
✨Tip Number 4
Apply through our website! We make it easy for you to submit your application directly, ensuring it gets into the right hands. Plus, it shows you're serious about joining our team at TCS.
We think you need these skills to ace Senior IP Design Engineer in Telford
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the Senior IP Design Engineer role. Highlight your expertise in System Verilog RTL and any hands-on experience with 100Gb Ethernet or PCIe Gen5. We want to see how your skills align with what we're looking for!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about FPGA/Adaptive SoC design and how your previous projects have prepared you for this role. Let us know what excites you about working with TCS.
Showcase Your Projects: If you've worked on relevant projects, don't hold back! Include links or descriptions of your work that demonstrate your proficiency in Vivado/Vitis and scripting skills in Python and Tcl. We love seeing real examples of your capabilities.
Apply Through Our Website: We encourage you to apply through our website for a smoother application process. It helps us keep track of your application and ensures you don’t miss out on any important updates. Plus, it’s super easy!
How to prepare for a job interview at Stackstudio Digital Ltd.
✨Know Your Stuff
Make sure you brush up on your System Verilog RTL design skills and be ready to discuss your hands-on experience with 100Gb Ethernet, PCIe Gen5, and AMBA/AXI. The interviewers will likely ask you technical questions, so being well-versed in these areas will show that you're the right fit for the role.
✨Showcase Your Projects
Prepare to talk about specific projects where you've designed high-performance IP for FPGA or Adaptive SoC technologies. Highlight your contributions, the challenges you faced, and how you collaborated with engineering teams to meet quality and performance targets. Real-world examples can make a big impact!
✨Get Familiar with Tools
Since you'll be working with tools like Vivado/Vitis and using scripting languages like Python and Tcl, it’s a good idea to have some practical knowledge of these. If you can, bring up any relevant experiences or projects where you used these tools effectively during the interview.
✨Ask Insightful Questions
Interviews are a two-way street! Prepare some thoughtful questions about the team dynamics, project goals, and how TCS supports professional growth. This not only shows your interest in the role but also helps you gauge if the company is the right fit for you.
