SmartEdge, Lda is seeking experienced SoC Design Verification Engineers to verify a next-generation multi-die SoC. You will perform subsystem and SoC-level verification using SystemVerilog/UVM, and develop processor-based C tests for embedded cores.
Ideal candidates have strong debugging skills, understand ARM-based SoC architectures, and can adapt existing verification environments to evolving design requirements while contributing to regression planning and coverage closure.
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SoC DV Engineer: SystemVerilog/UVM & Embedded C Verification employer: SmartEdge, Lda
At SmartEdge, we pride ourselves on fostering a collaborative and innovative work culture that empowers our employees to excel in their roles. As a Process Quality Engineer, you will benefit from continuous professional development opportunities, competitive compensation, and a supportive environment that values data-driven decision-making. Located in a vibrant area, our company offers unique advantages such as access to cutting-edge technology and a commitment to maintaining high standards in GMP/ISO compliance.