Senior RTL CPU Microarchitecture Engineer (Midcore)

Senior RTL CPU Microarchitecture Engineer (Midcore)

Full-Time 35000 - 45000 Β£ / year (est.) No working from home possible
SiFive

At a Glance

  • Tasks: Design cutting-edge CPU cores using RISC-V architecture and collaborate with teams.
  • Company: SiFive, a leader in CPU design based in Cambridge, UK.
  • Benefits: Competitive salary, flexible working hours, and opportunities for professional growth.
  • Other info: Dynamic work environment focused on innovation and teamwork.
  • Why this job: Join a pioneering team and shape the future of CPU technology.
  • Qualifications: BS/MS in relevant field and 5+ years of design experience required.

The predicted salary is between 35000 - 45000 Β£ per year.

SiFive is seeking a CPU Microarchitecture/RTL design engineer in Cambridge, UK. The role involves designing industry-leading CPU cores using the RISC-V architecture and requires a BS/MS degree in a relevant field along with 5+ years of design experience.

Responsibilities include:

  • Architecting new features
  • Integrating design content
  • Collaborating with teams to achieve performance goals

The role demands strong skills in Verilog, System Verilog, or VHDL, and a focus on quality and teamwork.

Senior RTL CPU Microarchitecture Engineer (Midcore) employer: SiFive

SiFive is an exceptional employer that fosters a collaborative and innovative work culture in the heart of Cambridge, UK. With a strong emphasis on employee growth, SiFive offers numerous opportunities for professional development and encourages creativity in designing cutting-edge CPU cores. The company values quality and teamwork, making it an ideal place for engineers looking to make a meaningful impact in the tech industry.

SiFive

Contact Details:

SiFive Recruitment Team

We think you need these skills to ace Senior RTL CPU Microarchitecture Engineer (Midcore)

CPU Microarchitecture
RTL Design
RISC-V Architecture
Verilog
System Verilog
VHDL
Design Integration