SiFive in Cambridge, United Kingdom, is seeking a CPU Microarchitecture/RTL design engineer to help build industry-leading RISC‑V cores. You will design features, implement ISA extensions, and advance Chisel-based workflows across the development stack. You will verify designs, collaborate with verification, physical design, and performance teams, and contribute to documentation and reusable test content in a fast-paced, collaborative environment. #J-18808-Ljbffr
RISC-V CPU RTL Architect & Microarchitecture Engineer employer: SiFive
SiFive is an exceptional employer, renowned for its commitment to innovation and collaboration in the technology sector. Located in the vibrant city of Cambridge, employees benefit from a dynamic work culture that fosters creativity and teamwork, alongside opportunities for professional growth in cutting-edge CPU design. With a focus on diversity and inclusion, SiFive not only champions groundbreaking ideas but also supports its talented workforce in achieving their career aspirations.
