At a Glance
- Tasks: Design high-performance CPU cores and integrate features within cutting-edge frameworks.
- Company: SiFive, a leader in RISC-V technology with a focus on innovation.
- Benefits: Competitive salary, flexible work options, and opportunities for professional growth.
- Other info: Collaborative environment with a strong emphasis on quality and efficiency.
- Why this job: Join a pioneering team and shape the future of CPU design with RISC-V.
- Qualifications: Experience in CPU microarchitecture and RTL design is essential.
The predicted salary is between 63000 - 77000 Β£ per year.
Si Five is seeking a CPU Microarchitecture/RTL design engineer to join a team delivering industry-leading CPU cores based on RISC-V.
You will design features, ISA extensions, and integrate content within Si Fiveβs Chisel/FIRRTL framework, enabling automatic configuration and validation.
The role emphasizes high-performance hardware IP, collaboration across verification, physical design, and performance teams, with a focus on quality and efficient design workflows.
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Senior RTL Design Engineer β High-Performance RISC-V Core in Cambridge employer: SiFive
SiFive is an exceptional employer that fosters a culture of innovation and collaboration, making it an ideal place for talented engineers to thrive. With a focus on cutting-edge technology and RISC-V adoption, employees benefit from continuous growth opportunities and the chance to work on impactful projects in a dynamic environment. Located in a vibrant tech hub, SiFive offers a supportive atmosphere where creativity and teamwork are highly valued.