Senior Debug, Trace & Profiling Architect (RISC‑V) in Cambridge
Senior Debug, Trace & Profiling Architect (RISC‑V)

Senior Debug, Trace & Profiling Architect (RISC‑V) in Cambridge

Cambridge Full-Time 80000 - 100000 £ / year (est.) No home office possible
SiFive

At a Glance

  • Tasks: Design and integrate debug, trace, and profiling hardware for RISC-V architecture.
  • Company: Leading semiconductor company based in Cambridge, UK.
  • Benefits: Competitive salary and comprehensive benefits package.
  • Other info: Exciting opportunity for career advancement in a cutting-edge field.
  • Why this job: Join a pioneering team and shape the future of hardware design.
  • Qualifications: 7+ years of experience with Verilog or similar languages required.

The predicted salary is between 80000 - 100000 £ per year.

A leading semiconductor company is seeking a hardware design engineer in Cambridge, UK. The ideal candidate will design debug, trace, and profiling hardware, focusing on RISC-V architecture.

Responsibilities include:

  • Designing hardware as configurable generators
  • Integrating it into Chisel/FIRRTL framework

Applicants should have a strong background with 7+ years of experience and proficiency in Verilog or similar languages. Competitive salary and benefits are offered.

Senior Debug, Trace & Profiling Architect (RISC‑V) in Cambridge employer: SiFive

Join a leading semiconductor company in Cambridge, UK, where innovation meets opportunity. We offer a collaborative work culture that fosters creativity and professional growth, alongside competitive salaries and comprehensive benefits. As a Senior Debug, Trace & Profiling Architect, you'll be at the forefront of RISC-V architecture, with ample opportunities to advance your career in a dynamic and supportive environment.
SiFive

Contact Detail:

SiFive Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land Senior Debug, Trace & Profiling Architect (RISC‑V) in Cambridge

Tip Number 1

Network like a pro! Reach out to folks in the semiconductor industry, especially those working with RISC-V. A friendly chat can open doors and give you insights that job postings just can't.

Tip Number 2

Show off your skills! If you've got projects or contributions related to debug, trace, or profiling hardware, make sure to highlight them in conversations. Real-world examples can set you apart from the crowd.

Tip Number 3

Prepare for technical interviews by brushing up on Verilog and the Chisel/FIRRTL framework. We all know that confidence is key, so practice explaining your thought process while solving problems.

Tip Number 4

Don't forget to apply through our website! It’s the best way to ensure your application gets noticed. Plus, we love seeing candidates who take that extra step to connect with us directly.

We think you need these skills to ace Senior Debug, Trace & Profiling Architect (RISC‑V) in Cambridge

Hardware Design
Debugging Skills
Trace and Profiling Techniques
RISC-V Architecture
Configurable Generators
Chisel/FIRRTL Framework
Verilog
Integration Skills
Experience in Semiconductor Industry
Analytical Skills
Problem-Solving Skills
Attention to Detail
Communication Skills

Some tips for your application 🫡

Tailor Your CV: Make sure your CV highlights your experience with RISC-V architecture and hardware design. We want to see how your skills align with the role, so don’t be shy about showcasing your 7+ years of experience!

Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you’re passionate about debug, trace, and profiling hardware. Let us know how your background makes you the perfect fit for our team.

Showcase Relevant Projects: If you've worked on projects involving Verilog or similar languages, make sure to mention them. We love seeing real-world applications of your skills, especially if they relate to configurable generators or the Chisel/FIRRTL framework.

Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you don’t miss out on any important updates from our team!

How to prepare for a job interview at SiFive

Know Your RISC-V Inside Out

Make sure you brush up on your knowledge of the RISC-V architecture. Be prepared to discuss its features, benefits, and how it compares to other architectures. This will show your passion and expertise in the field.

Showcase Your Hardware Design Skills

Bring examples of your previous work with debug, trace, and profiling hardware. If you've designed configurable generators or worked with Chisel/FIRRTL, be ready to explain your design choices and the impact they had on performance.

Practice Verilog and Similar Languages

Since proficiency in Verilog is key, make sure you can demonstrate your coding skills. Consider doing a mock coding interview or solving some sample problems to get comfortable discussing your thought process.

Prepare Questions for Them

Interviews are a two-way street! Prepare insightful questions about the company's projects, team dynamics, and future directions in hardware design. This shows you're genuinely interested and helps you assess if it's the right fit for you.

Senior Debug, Trace & Profiling Architect (RISC‑V) in Cambridge
SiFive
Location: Cambridge

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