Senior RTL/ALU Design Engineer - RISC-V in Cambridge

Senior RTL/ALU Design Engineer - RISC-V in Cambridge

Cambridge Full-Time 55000 - 70000 £ / year (est.) No working from home possible
SiFive UK Ltd.

At a Glance

  • Tasks: Design and optimise RISC-V arithmetic instructions in a hybrid RTL role.
  • Company: SiFive UK Ltd., a leader in innovative semiconductor technology.
  • Benefits: Diverse and inclusive culture, competitive salary, and flexible working options.
  • Other info: Opportunity to work in a dynamic environment with a focus on innovation.
  • Why this job: Join a cutting-edge team and shape the future of RISC-V technology.
  • Qualifications: Master's degree in electronic engineering or computer science with strong maths skills.

The predicted salary is between 55000 - 70000 £ per year.

SiFive UK Ltd. is seeking an experienced candidate for a hybrid role in RTL design, focusing on designing arithmetic RISC‑V instructions. The ideal candidate will have a Master's degree in electronic engineering or computer science with strong mathematical knowledge.

Your responsibilities will include:

  • Optimizing existing operators
  • Conducting formal testing
  • Documenting your work

SiFive promotes a diverse and inclusive work environment, which is central to their engineering philosophy.

Senior RTL/ALU Design Engineer - RISC-V in Cambridge employer: SiFive UK Ltd.

SiFive UK Ltd. is an exceptional employer that champions a diverse and inclusive work culture, fostering innovation and collaboration among its engineering teams. With a strong emphasis on employee growth, SiFive offers ample opportunities for professional development in the cutting-edge field of RISC-V design, all while enjoying the flexibility of a hybrid working model in a vibrant location. Join us to be part of a forward-thinking company that values your contributions and supports your career aspirations.

SiFive UK Ltd.

Contact Details:

SiFive UK Ltd. Recruitment Team

We think you need these skills to ace Senior RTL/ALU Design Engineer - RISC-V in Cambridge

RTL Design
RISC-V Architecture
Arithmetic Instruction Design
Formal Testing
Documentation Skills
Mathematical Knowledge
Optimisation Techniques