SiFive, Inc. in Cambridge, UK seeks a Senior RTL Design Engineer to architect and implement new features for RISC-V CPU frontends.
You will integrate content into the Chisel/FIRRTL framework and support automatic configuration, docs, and robust verification. You will verify designs in sandbox environments, collaborate with physical implementation to meet frequency and power goals, and work with performance modeling for optimization.
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Senior RTL Engineer - CPU Frontend (RISC-V) in Cambridge employer: SiFive, Inc.
SiFive is an exceptional employer, renowned for its commitment to innovation and collaboration in the tech industry. Located in Cambridge, England, employees benefit from a vibrant work culture that fosters creativity and teamwork, alongside opportunities for professional growth in cutting-edge semiconductor technology. With a focus on functional safety and a supportive environment, SiFive empowers its team members to make a meaningful impact on the future of computing.
