Technology Enablement Principal - DFT, In-System Test

The Tessent division seeks a highly motivated, creative, and energetic individual as Principal Technology Enablement Engineer, specializing in Design For Test (DFT) and test delivery at chip and system level with a main focus on In-System Test solutions. Tessent is the market and technology leader of automated tools for insertion of semiconductor DFT structures, Automatic Test Pattern Generation (ATPG), Embedded Deterministic Test (EDT), Memory Built-In Self-Test (MBIST), Logic Built-In Self-Test (LBIST), Diagnosis-Driven Yield Analysis (DDYA), hierarchical DFT solutions such as Streaming Scan Network (SSN), and analog fault injection and test. This position offers a great opportunity to stay involved technically while gaining exposure to marketing and interacting with sales. As a Principal Technology Enablement Engineer, you will drive the adoption of Tessent In-System Solutions through strategic and tactical support. You will engage with customers at the early product definition phase to support architecture and methodology definition that enables successful adoption while meeting customer requirements. You will work across multiple stakeholders—including Tessent R&D, field, and customers—to achieve Technology Enablement targets and roadmaps.

What you’ll be doing:

• Grow adoption and simplify tool usage through ecosystem development
• Provide strategic support for sales and customers via reviews, flow development, test cases, and automation tools
• Work closely with customers to support architecture and methodology definition
• Offer tactical support for sales and customers through field and internal tickets
• Promote partnerships and differentiation with customers
• Collaborate with Tessent R&D and field to test new released products and features within complex IC design flows
• Resolve complex technical issues and independently create solutions and new methodologies
• Present complex principles in simple terms to broad audiences
• Collaborate and share information across team boundaries in written and spoken forms
• Travel as needed, both domestic and international

What you’ll bring:

• BS degree (or equivalent) in Electrical Engineering or related field.
• 10+ years of relevant experience in the semiconductor or electronic design automation (EDA) industry.
• Expert level knowledge in areas including DFT for complex ASICs/SoCs, ATPG, LBIST, embedded memory test, IEEE 1687 I-JTAG, hierarchical DFT, chip-level integration, DFT architecture, packetized test delivery, and IC design flow automation.
• High energy, curious individual, self-motivated to learn new DFT methodologies and technologies.
• Ability to work as an individual contributor.
• Demonstrated excellence in relationship building and conflict resolution, with proven experience managing both technical discussions and interpersonal dynamics in a professional environment.
• Exceptional verbal and written English communication skills, including the ability to clearly explain product value propositions, competitive advantages, and roadmaps to technical audiences as well as executives and management.

The salary range for this position is GBP 82,200 to GBP 143,700 and this role is eligible to earn incentive compensation. The actual compensation offered is based on the successful candidate’s job-related skills, experience, and relevant education/training. Siemens offers health and wellness benefits to employees; you can access the benefits available in your country via the link: (Benefits).