We are seeking a seasoned Design Verification designer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions
Responsibilities
- Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems
- Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards
- Collaborate with software teams to define and implement configurable testbenches
- Work with design teams test plans, failure debug, coverage, etc.
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HARDWARE VERIFICATION ENGINEER in Cambridge employer: Semiconductor Engineering
As a leading innovator in the semiconductor industry, our company offers an exceptional work environment for Senior/Staff Subsystem & SoC Design Engineers. Located in a vibrant tech hub, we foster a collaborative culture that encourages creativity and professional growth, providing ample opportunities for skill development and career advancement. With competitive benefits and a commitment to work-life balance, we ensure our employees thrive both personally and professionally while contributing to cutting-edge projects.
