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For Companies At a Glance
- Tasks: Join us to design cutting-edge SoCs through hands-on physical implementation and timing closure.
- Company: Be part of Samsung, a global leader in technology and innovation.
- Benefits: Enjoy competitive pay, flexible work options, and access to the latest tech tools.
- Why this job: Work on impactful projects that shape the future of technology in a collaborative environment.
- Qualifications: Bring 8-14 years of experience in physical design and a passion for innovation.
- Other info: Opportunity to participate in multiple successful SoC tape-outs.
The predicted salary is between 48000 - 84000 £ per year.
Complex SOC Top Physical Implementation for next generation SoCs through synthesis, place and route, STA, timing, and physical sign-offs.
Role and Responsibilities
- Hands-on experience in physical design and timing closure of complex blocks and full-chip designs.
- Strong understanding of timing, power, and area trade-offs, with a focus on PPA optimization.
- Proficiency with industry-standard tools (ICC, DC, PT, VSLP, Redhawk, Calibre, Formality) and understanding their capabilities.
- Solid understanding of scripting languages such as Perl and Tcl, and implementation flows.
- Experience with large SoC designs (>20M gates) operating at frequencies above 1GHz.
- Expertise in block-level and full-chip SDC cleanup, synthesis optimization, low power checking, and logic equivalence checking.
- Familiarity with deep sub-micron designs (8nm/5nm) and related issues like manufacturability, power, signal integrity, and scaling.
- Knowledge of typical SoC issues such as multiple voltage and clock domains, ESD strategies, mixed-signal block integration, and package interactions.
- Experience with hierarchical and top-down design, budgeting, timing, and physical convergence.
Skills and Qualifications
- Experience in top-level floorplanning, including partition shaping, pin placement, channel planning, high-speed signal and clock planning, and feed-through planning.
- Understanding of Physical Design Verification methodologies to debug LVS/DRC issues at chip/block level.
- Participation in at least 4 recent successful SoC tape-outs.
- 8 to 14 years of experience in physical implementation and design.
Memory Team - Physical Design Engineer employer: SAMSUNG
Contact Detail:
SAMSUNG Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Memory Team - Physical Design Engineer
✨Tip Number 1
Network with professionals in the semiconductor industry, especially those who have experience in physical design. Attend relevant conferences or webinars to meet potential colleagues and learn about the latest trends and technologies.
✨Tip Number 2
Showcase your hands-on experience with industry-standard tools like ICC, DC, and Calibre by discussing specific projects where you used these tools effectively. This will demonstrate your practical knowledge and make you stand out.
✨Tip Number 3
Familiarise yourself with the latest advancements in deep sub-micron designs and their challenges. Being able to discuss these topics during interviews will show your commitment to staying updated in the field.
✨Tip Number 4
Prepare to discuss your experience with SoC tape-outs and the specific roles you played in those projects. Highlighting your contributions will help illustrate your capability to handle complex designs and meet deadlines.
We think you need these skills to ace Memory Team - Physical Design Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience in physical design and timing closure. Emphasise your hands-on experience with complex SoC designs and the specific tools mentioned in the job description.
Craft a Strong Cover Letter: In your cover letter, explain why you are a great fit for the Memory Team position. Discuss your expertise in PPA optimisation and your familiarity with deep sub-micron designs, as well as any relevant projects you've worked on.
Showcase Relevant Projects: Include specific examples of past projects where you participated in successful SoC tape-outs. Highlight your role in top-level floorplanning and any challenges you overcame during the design process.
Highlight Technical Skills: Clearly list your proficiency with industry-standard tools and scripting languages. Mention your experience with large SoC designs and any relevant methodologies you have used for Physical Design Verification.
How to prepare for a job interview at SAMSUNG
✨Showcase Your Technical Expertise
Be prepared to discuss your hands-on experience with physical design and timing closure. Highlight specific projects where you optimised PPA and used industry-standard tools like ICC and DC. This will demonstrate your capability and familiarity with the role's requirements.
✨Discuss Your Problem-Solving Skills
Prepare examples of how you've tackled complex SoC issues, such as ESD strategies or mixed-signal block integration. Sharing your thought process during these challenges can illustrate your analytical skills and ability to work under pressure.
✨Familiarise Yourself with Current Trends
Stay updated on the latest developments in deep sub-micron designs and their implications. Being able to discuss recent advancements or challenges in the field will show your passion and commitment to staying relevant in the industry.
✨Prepare for Technical Questions
Expect in-depth technical questions related to floorplanning, SDC cleanup, and physical design verification methodologies. Practising these topics beforehand will help you articulate your knowledge clearly and confidently during the interview.
