At a Glance
- Tasks: Develop and execute verification plans for cutting-edge Quantum Error Correction systems.
- Company: Join Riverlane, a leader in quantum error correction technology.
- Benefits: Enjoy competitive pay, bonuses, private medical insurance, and 28 days annual leave.
- Other info: Diverse team environment with excellent growth and learning opportunities.
- Why this job: Be part of groundbreaking technology that tackles humanity's biggest challenges.
- Qualifications: Degree in Electrical Engineering or Computer Science; familiarity with digital logic and HDL languages.
The predicted salary is between 28000 - 38000 £ per year.
Cambridge, UK | Full-time | Permanent | Hybrid
About us
Riverlane’s mission is to master quantum error correction (QEC) and unlock a new age of human progress. From advances in material and climate science to complex chemistry simulation for new drug design, quantum computers will help humanity solve some of its most important challenges. But without QEC, the industry’s defining technical challenge, such breakthroughs can never be achieved. Riverlane is the world leader in QEC technology. Having raised more than $125M in funding to date to accelerate our cutting‑edge R&D in quantum error correction (QEC), Riverlane partners with many of the world’s leading quantum hardware providers and government agencies to make fault‑tolerant quantum computing a reality.
About the role
We have an exceptional opportunity for a Graduate Verification Engineer to join our talented team of hardware designers and embedded software engineers. Together, you’ll deliver fully verified, high‑performance, and trusted systems. In this exciting role you'll have end‑to‑end visibility across the entire stack, owning different aspects of verification and shaping how quality and reliability are built into our cutting‑edge technology. You do not need a background in quantum computing! You will learn this along the way.
What you will do - specific responsibilities
- Help with developing and executing verification plans for hardware blocks in Quantum Error Correction Systems
- Learn and support the creation of testbenches using SystemVerilog and UVM
- Run simulations and perform debugging to resolve issues in collaboration with the design team
- Collaborate with multi‑disciplinary teams to understand specifications and define verification strategies for Quantum Error Correction systems
- Learn and apply best practices in verification to make methodology improvements
What we need - Essential Skills/Experience
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Science or related discipline
- Understanding of Digital Logic Design
- Some familiarity with HDL languages (e.g., Verilog, SystemVerilog) and simulation tools
- Good communication and problem‑solving skills
- Relevant academic projects, internships, or work experience
- Exposure to scripting languages such as Python
- Understanding of Object‑Oriented Programming
- Exposure to UVM
What can you expect from us
- A comprehensive benefits package that includes an annual bonus plan, private medical insurance, life insurance, and a contributory pension scheme
- Equity, so that our team can share in the long‑term success of Riverlane
- 28 days annual leave, plus bank holidays and enhanced family leave
- A diverse work environment that brings together experts in many fields (including software and hardware development, quantum information theory, physics and maths) and over 20 different nationalities
- A learning environment that encourages individual, team and company growth and development, including a regular programme of learning events and training and conference budgets
Equal Opportunity
Everyone is welcome at Riverlane. We are an equal opportunities employer and encourage applications from eligible and suitably qualified candidates regardless of age, disability, ethnicity, gender, gender reassignment, religion or belief, sexual orientation, marital or civil partnership status, or pregnancy and maternity/paternity. Women and other underrepresented groups may be less likely to apply for a role unless they meet all or nearly all of the requirements. If this applies to you, we still encourage you to apply - you may be a great fit, even if you don’t meet every single qualification. We’d love to hear from you. If you need any adjustments made to the application or selection process so you can do your best, please let us know. We will be happy to help.
Graduate Verification Engineer New Cambridge, UK employer: Riverlane Ltd
Riverlane is an exceptional employer located in Cambridge, UK, offering a dynamic and inclusive work environment where innovation thrives. With a strong focus on employee growth, Riverlane provides comprehensive benefits, including an annual bonus plan, private medical insurance, and opportunities for continuous learning through training and conferences. Join a diverse team of experts dedicated to pioneering advancements in quantum error correction, where your contributions will directly impact the future of technology.
StudySmarter Expert Advice🤫
We think this is how you could land Graduate Verification Engineer New Cambridge, UK
✨Tip Number 1
Network like a pro! Reach out to people in the industry, attend events, and connect with Riverlane employees on LinkedIn. A friendly chat can open doors that applications alone can't.
✨Tip Number 2
Prepare for interviews by diving deep into Quantum Error Correction. Brush up on your digital logic design knowledge and be ready to discuss how your skills can contribute to Riverlane's mission.
✨Tip Number 3
Show off your problem-solving skills! Be ready to tackle some technical challenges during interviews. Think of examples from your projects or internships where you overcame obstacles.
✨Tip Number 4
Don’t forget to apply through our website! It’s the best way to ensure your application gets noticed. Plus, it shows you’re genuinely interested in being part of the Riverlane team.
We think you need these skills to ace Graduate Verification Engineer New Cambridge, UK
Some tips for your application 🫡
Show Your Passion:When writing your application, let your enthusiasm for quantum computing and verification shine through! We want to see your genuine interest in the field, so don’t hold back on sharing what excites you about this role.
Tailor Your CV:Make sure your CV is tailored to highlight relevant skills and experiences that align with the Graduate Verification Engineer position. We’re looking for specific examples of your work in digital logic design or any projects that showcase your problem-solving abilities.
Craft a Compelling Cover Letter:Your cover letter is your chance to tell us why you’re the perfect fit for our team. Use it to explain how your background and interests connect with our mission at Riverlane. Keep it concise but impactful!
Apply Through Our Website:We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it’s super easy to do!
How to prepare for a job interview at Riverlane Ltd
✨Know Your Basics
Make sure you brush up on your understanding of digital logic design and HDL languages like Verilog or SystemVerilog. Even if you don’t have extensive experience, being able to discuss these concepts confidently will show your enthusiasm and readiness to learn.
✨Showcase Your Projects
Prepare to talk about any relevant academic projects or internships you've completed. Highlight your role in these projects, especially if they involved verification processes or collaboration with teams. This will demonstrate your practical experience and problem-solving skills.
✨Ask Smart Questions
During the interview, don’t hesitate to ask questions about Riverlane’s approach to quantum error correction and how verification fits into their overall strategy. This shows that you’re genuinely interested in the company and the role, plus it gives you insight into what they value.
✨Practice Communication
Since good communication is key for this role, practice explaining complex technical concepts in simple terms. You might be asked to collaborate with multi-disciplinary teams, so being able to convey your ideas clearly will set you apart from other candidates.
