Staff Design Verification Engineer

Staff Design Verification Engineer

Full-Time 43200 - 72000 £ / year (est.) No home office possible
Renesas Electronics Corporation

At a Glance

  • Tasks: Ensure the correctness of complex ASIC designs through advanced verification methodologies.
  • Company: Join Renesas, a leader in embedded semiconductor solutions with a diverse global team.
  • Benefits: Flexible work environment, remote options, and opportunities for career advancement.
  • Why this job: Make a real impact by developing innovative products that improve lives.
  • Qualifications: 10+ years in design verification with strong skills in SystemVerilog and UVM.
  • Other info: Collaborative culture focused on continuous learning and diversity.

The predicted salary is between 43200 - 72000 £ per year.

We are seeking a highly skilled and motivated Staff Design Verification Engineer to join our hardware development team. In this role, you will be responsible for ensuring the functional correctness and robustness of complex digital and mixed-signal ASIC designs through advanced verification methodologies. You will work closely with architects, designers, and other verification engineers to deliver high-quality silicon solutions.

Responsibilities:

  • Develop and execute comprehensive verification plans for complex mixed-signal ASIC designs.
  • Create and maintain testbenches using SystemVerilog/UVM.
  • Write and debug test cases to verify functionality, performance, and corner cases.
  • Perform block-level and full-chip verification, including simulation, coverage analysis, and regression run/debug.
  • Collaborate with design engineers to understand specifications and identify verification requirements.
  • Analyze and resolve issues found during verification and post-silicon validation.
  • Mentor junior engineers and contribute to improving verification processes and infrastructure.
  • Participate in code reviews and contribute to continuous improvement of design and verification practices.
  • Manage and debug gate-level simulation (pre- and post-layout, with and without SDF timing annotation).

Qualifications:

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 10+ years of experience in digital and/or mixed-signal design verification.
  • Strong proficiency in SystemVerilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium).
  • Solid understanding of digital design fundamentals, RTL design, and ASIC development flows.
  • Experience with scripting languages (Python, Perl, Tcl) for automation.
  • Familiarity with formal verification, assertion-based verification, and coverage-driven verification.
  • Excellent problem-solving skills and attention to detail.
  • Strong communication and teamwork abilities.
  • Experience with version control systems and CI/CD workflows.
  • Experience with other verification methodologies (e.eRM, hardware/software co-simulation).
  • Knowledge of standard protocols desired (AMBA, I2C, etc.)

Additional Information:

Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power.

With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘To Make Our Lives Easier.’

At Renesas, you can:

  • Launch and advance your career in technical and business roles across four Product Groups and various corporate functions.
  • Make a real impact by developing innovative products and solutions to meet our global customers’ evolving needs and help make people’s lives easier, safe and secure.
  • Maximise your performance and wellbeing in our flexible and inclusive work environment.

Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together.

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law.

We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in-office days are Tuesday through Thursday for innovation, collaboration and continuous learning.

Staff Design Verification Engineer employer: Renesas Electronics Corporation

Renesas Electronics is an exceptional employer that fosters a people-first culture, offering flexible work arrangements and a commitment to diversity and inclusion. With opportunities for career advancement across various technical and business roles, employees can make a meaningful impact by developing innovative semiconductor solutions in a collaborative environment. The company's focus on employee wellbeing and professional growth, combined with its global presence, makes it an attractive place for talented individuals looking to shape the future of technology.
Renesas Electronics Corporation

Contact Detail:

Renesas Electronics Corporation Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land Staff Design Verification Engineer

✨Tip Number 1

Network like a pro! Reach out to your connections in the industry, attend meetups, and engage on platforms like LinkedIn. We all know that sometimes it’s not just what you know, but who you know that can help you land that dream job.

✨Tip Number 2

Prepare for those interviews! Research the company, understand their products, and be ready to discuss how your skills in SystemVerilog and UVM can contribute to their projects. We want you to shine and show them why you’re the perfect fit!

✨Tip Number 3

Don’t forget to follow up after interviews! A quick thank-you email can go a long way in keeping you top of mind. We recommend mentioning something specific from your conversation to make it personal and memorable.

✨Tip Number 4

Apply through our website! It’s the best way to ensure your application gets seen by the right people. Plus, we love seeing candidates who are proactive and eager to join our team at Renesas.

We think you need these skills to ace Staff Design Verification Engineer

SystemVerilog
UVM
Digital Design Fundamentals
ASIC Development Flows
Testbench Creation and Maintenance
Simulation Tools (Synopsys VCS, Cadence Xcelium)
Scripting Languages (Python, Perl, Tcl)
Formal Verification
Assertion-Based Verification
Coverage-Driven Verification
Problem-Solving Skills
Attention to Detail
Communication Skills
Teamwork Abilities
Version Control Systems

Some tips for your application 🫡

Tailor Your CV: Make sure your CV is tailored to the Staff Design Verification Engineer role. Highlight your experience with SystemVerilog, UVM, and any relevant projects that showcase your skills in digital and mixed-signal design verification.

Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about this role and how your background aligns with our mission at Renesas. Don’t forget to mention specific experiences that relate to the job description.

Showcase Your Problem-Solving Skills: In your application, be sure to include examples of how you've tackled complex verification challenges in the past. We love seeing candidates who can think critically and come up with innovative solutions!

Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it shows you’re keen on joining our team!

How to prepare for a job interview at Renesas Electronics Corporation

✨Know Your Verification Methodologies

Make sure you brush up on advanced verification methodologies, especially SystemVerilog and UVM. Be ready to discuss how you've applied these in past projects, as this will show your depth of knowledge and practical experience.

✨Prepare for Technical Questions

Expect technical questions related to digital and mixed-signal design verification. Review key concepts like RTL design, simulation tools, and coverage analysis. Practising coding problems or debugging scenarios can also give you an edge.

✨Showcase Your Problem-Solving Skills

Be prepared to share specific examples of challenges you've faced during verification processes and how you resolved them. This demonstrates your analytical thinking and ability to work under pressure, which are crucial for the role.

✨Emphasise Team Collaboration

Since the role involves working closely with architects and designers, highlight your teamwork experiences. Discuss how you've collaborated on projects, mentored junior engineers, or contributed to improving processes, as this aligns with the company’s values.

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