Contract FPGA Design Engineer - VHDL in Surrey

Contract FPGA Design Engineer - VHDL in Surrey

Surrey Freelance 40000 - 50000 £ / year (est.) No working from home possible
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At a Glance

  • Tasks: Join a dynamic team to redesign cutting-edge electronics for safety and monitoring.
  • Company: Leading designer in specialised instrumentation with a focus on innovation.
  • Benefits: Competitive pay, flexible working through your own PSC, and valuable industry experience.
  • Other info: Initial 3-month contract with potential for growth in a collaborative environment.
  • Why this job: Make a real impact on technology that will be used for years to come.
  • Qualifications: Experience in FPGA development and strong VHDL skills required.

The predicted salary is between 40000 - 50000 £ per year.

The Redline Group are working in collaboration with a leading designer in specialised instrumentation to secure the services of a Contract FPGA Design Engineer - VHDL to work on-site at their offices near Staines. Commutable from Windsor, Leatherhead and the surrounding areas, this is an initial 3-month opportunity where you will assist in the re-design of key electronics.

Our client has been designing cutting-edge equipment used in a range of industries for many years, focusing on technology which not only provides safety, but will allow analysis and monitoring. You will join a small design team who have been tasked with a re-design project, creating a secure and robust product which will be in use for years to come.

This role has an indicative OUTSIDE IR35 determination therefore we can accept candidates who would like to operate through their own PSC.

Key Skills Required - Contract FPGA Design Engineer, Staines:
  • Proven experience of FPGA development, in particular the Xilinx Spartan family
  • Strong experience of using VHDL
  • Experience within a scientific/instrumentation/regulated background is not essential but useful.

For more information or to apply for the Contract FPGA Design Engineer opportunity in Staines, please contact Jack Kelly.

Contract FPGA Design Engineer - VHDL in Surrey employer: Redline

The Redline Group is an exceptional employer, offering a dynamic work environment where innovation thrives. Located near Staines, our company fosters a collaborative culture that encourages professional growth and development, making it an ideal place for Contract FPGA Design Engineers to contribute to cutting-edge projects while enjoying the benefits of a supportive team. With a focus on meaningful work in specialised instrumentation, employees can take pride in creating technology that enhances safety and monitoring across various industries.

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Contact Details:

Redline Recruitment Team

StudySmarter Expert Advice🤫

We think this is how you could land Contract FPGA Design Engineer - VHDL in Surrey

Tip Number 1

Network like a pro! Reach out to your connections in the industry, especially those who might know about opportunities in FPGA design. A friendly chat can sometimes lead to job openings that aren't even advertised.

Tip Number 2

Show off your skills! If you’ve got a portfolio of projects or any relevant work, make sure to have it ready to share. A quick demo of your FPGA development experience can really set you apart from the crowd.

Tip Number 3

Prepare for the interview like it’s the final exam! Research the company and their projects, especially anything related to VHDL and the Xilinx Spartan family. Being knowledgeable about their work will impress them and show you’re genuinely interested.

Tip Number 4

Don’t forget to apply through our website! We’ve got loads of opportunities, and applying directly can sometimes give you an edge. Plus, we’re here to help you every step of the way!

We think you need these skills to ace Contract FPGA Design Engineer - VHDL in Surrey

FPGA Development
VHDL
Xilinx Spartan Family
Design Engineering
Electronics Re-design
Instrumentation Knowledge
Regulated Industry Experience

Some tips for your application 🫡

Tailor Your CV:Make sure your CV highlights your experience with FPGA development and VHDL. We want to see how your skills match the job description, so don’t be shy about showcasing relevant projects or roles you've had in the past.

Craft a Compelling Cover Letter:Your cover letter is your chance to shine! Use it to explain why you’re the perfect fit for the Contract FPGA Design Engineer role. We love seeing enthusiasm and a bit of personality, so let us know what excites you about this opportunity.

Showcase Relevant Experience:If you’ve worked in scientific or regulated environments, make sure to mention it! Even if it’s not essential, it can give you an edge. We appreciate candidates who understand the importance of safety and compliance in design.

Apply Through Our Website:We encourage you to apply directly through our website. It makes the process smoother for both you and us. Plus, it ensures we get all the info we need to consider your application properly!

How to prepare for a job interview at Redline

Know Your VHDL Inside Out

Make sure you brush up on your VHDL skills before the interview. Be prepared to discuss specific projects where you've used VHDL, especially with the Xilinx Spartan family. Having concrete examples ready will show your expertise and confidence.

Understand the Company’s Focus

Research the company’s work in specialised instrumentation. Familiarise yourself with their products and how they contribute to safety and monitoring. This knowledge will help you tailor your answers and demonstrate your genuine interest in the role.

Prepare for Technical Questions

Expect technical questions related to FPGA development. Practice explaining your design process and problem-solving strategies clearly. You might even want to run through some common scenarios or challenges you’ve faced in past projects.

Show Team Spirit

Since you'll be joining a small design team, highlight your teamwork skills. Share examples of how you've collaborated with others in previous roles, especially in high-pressure situations. This will show that you can fit into their dynamic environment.