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For Companies At a Glance
- Tasks: Design and implement cutting-edge FPGA systems for ultra-low latency trading.
- Company: Join a global trading firm with a focus on innovation and collaboration.
- Benefits: Competitive salary, hybrid work model, and opportunities for professional growth.
- Why this job: Make a real impact in high-performance computing and trading technology.
- Qualifications: Strong RTL skills and programming experience in C/C++ required.
- Other info: Be part of a dynamic team with minimal bureaucracy and deep technical ownership.
The predicted salary is between 36000 - 60000 £ per year.
Location: London (Hybrid: 4 days onsite)
Sector: Quant Trading / High-Performance Computing
Quant Capital is partnering with a global trading firm building a greenfield FPGA team focused on low-latency, high-throughput hardware systems. This small, senior group will deliver high-speed compute infrastructure integrated directly into trading, research, and networking pipelines.
What You’ll Be Doing
- Designing and implementing latency‑optimised FPGA systems in Verilog/SystemVerilog
- Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining
- Using simulation and formal tools (Verilator, Cocotb, etc.) for validation
- Working across teams (ASIC, software, infra) to co‑design tightly coupled platforms
- Contributing to tooling, flow, and potentially DSL extensions
What We’re Looking For
- Strong RTL skills with experience building complex, optimised designs
- Programming skills in C, C++ or similar
- Solid grasp of timing closure, datapath design, and hardware‑level performance tuning
- Familiar with toolchains (Vivado, Quartus) and debugging workflows
- Comfortable working close to hardware and owning the full development cycle
- Interest in improving hardware workflows or applying high‑level techniques
Bonus
- Background in trading systems, signal processing, or networking
- Experience with formal verification and/or hardware DSLs
- Knowledge of FPGA‑based networking acceleration
Why Join?
- Build from scratch with a team driving real strategy and architectural decisions
- Work across the full lifecycle, from concept to deployment
- Deep technical ownership, minimal overhead, and real impact
- Collaborate with top engineers in a no‑bureaucracy culture
Seniority level: Mid‑Senior level
Employment type: Full‑time
Job function: Information Technology, Capital Markets and Financial Services
Senior FPGA Engineer in England employer: Quant Capital
Contact Detail:
Quant Capital Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior FPGA Engineer in England
✨Network Like a Pro
Get out there and connect with folks in the industry! Attend meetups, conferences, or even online webinars related to FPGA engineering. You never know who might have a lead on that perfect job or can put in a good word for you.
✨Show Off Your Skills
Create a portfolio showcasing your FPGA projects and any relevant work you've done. This could be anything from personal projects to contributions in previous roles. Having tangible evidence of your skills can really set you apart during interviews.
✨Ace the Interview
Prepare for technical interviews by brushing up on your Verilog/SystemVerilog knowledge and be ready to discuss your past projects in detail. Practice common interview questions and think about how your experience aligns with the role at Quant Capital.
✨Apply Through Our Website
Don't forget to apply directly through our website! It not only shows your enthusiasm but also helps us keep track of your application. Plus, it gives you a better chance of getting noticed by the hiring team.
We think you need these skills to ace Senior FPGA Engineer in England
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience with FPGA systems and any relevant projects you've worked on. We want to see how your skills align with the role, so don’t be shy about showcasing your RTL skills and programming prowess!
Craft a Compelling Cover Letter: Your cover letter is your chance to tell us why you’re the perfect fit for our team. Share your passion for low-latency systems and how your background in high-performance computing can contribute to our goals. Keep it engaging and personal!
Showcase Your Technical Skills: When filling out your application, make sure to mention specific tools and technologies you’ve used, like Verilog/SystemVerilog or Vivado. We love seeing candidates who are comfortable with the full development cycle and have a solid grasp of timing closure.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it shows us you’re keen on joining our team!
How to prepare for a job interview at Quant Capital
✨Know Your FPGA Stuff
Make sure you brush up on your Verilog/SystemVerilog skills. Be ready to discuss your experience with latency-optimised designs and high-speed modules like PCIe and Ethernet. The more specific examples you can provide, the better!
✨Show Off Your Teamwork Skills
Since this role involves working closely with ASIC, software, and infrastructure teams, be prepared to share examples of how you've collaborated in the past. Highlight any projects where you co-designed platforms or contributed to tooling.
✨Get Familiar with the Tools
Familiarise yourself with the toolchains mentioned in the job description, like Vivado and Quartus. If you have experience with simulation and formal tools like Verilator or Cocotb, make sure to mention that too!
✨Demonstrate Your Problem-Solving Skills
Be ready to discuss how you've tackled timing closure and performance tuning challenges in previous projects. Employers love candidates who can think critically and come up with innovative solutions to complex problems.
