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- Tasks: Develop and execute DFT strategies for innovative silicon solutions.
- Company: Join a leading tech company known for its cutting-edge projects.
- Benefits: Remote work, competitive salary, and opportunities for professional growth.
- Other info: Collaborate with world-class engineers and enhance your skills in a supportive setting.
- Why this job: Be part of a dynamic team delivering high-quality technology in a fast-paced environment.
- Qualifications: Bachelor's degree in relevant field and experience in DFT techniques.
The predicted salary is between 60000 - 80000 £ per year.
We’re looking for multiple experienced DFT Engineers to join a cutting‑edge programme with one of the world’s largest and most innovative technology companies, working remotely in the UK. This role focuses on developing and executing DFT strategies including scan design, ATPG, and verification, collaborating with world‑class engineering teams to deliver high‑quality silicon solutions in a fast‑paced ASIC/SoC environment.
Job Responsibilities
- Develop DFT strategy for hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
- Perform ATPG, scan coverage debug and drive design fixes for coverage and quality improvements.
- Perform scan verification at RTL and gate level.
- Prepare scan content and deliverables for Silicon Engineering execution.
- Debug scan patterns on tester per requirement.
- Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT Scan requirements are met and mutual dependencies are managed.
Minimum Qualifications
- Bachelor’s degree in electrical engineering, Computer Engineering, or a related field, or equivalent practical experience.
- Experience with multiple projects in DFT scan design and verification.
- Experience with DFT techniques and tools, ASIC DFT synthesis, simulation, and verification flow.
- Experience in Automatic Test Pattern Generation (ATPG) methods.
Preferred Qualifications
- Familiar with EDA tools like Mentor (Tessent) from Siemens.
- Master’s degree in electrical engineering.
- Experience in IP integration (e.g., memories, test controllers, Test Access Point (TAP), and Memory Built‑In Self‑Test (MBIST)).
- Experience in fault modelling.
- Experience in SoC cycles, including silicon bring up and silicon debug activities.
- Experience working with ATE engineers (e.g., silicon bring‑up, patterns generation, debug, validation on automatic test equipment, debug of silicon issues).
DFT Engineer employer: Qualitest
Contact Detail:
Qualitest Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land DFT Engineer
✨Tip Number 1
Network like a pro! Reach out to your connections in the industry, attend virtual meetups, and engage with professionals on platforms like LinkedIn. We all know that sometimes it’s not just what you know, but who you know that can help you land that DFT Engineer role.
✨Tip Number 2
Prepare for those interviews! Brush up on your DFT strategies, scan design, and ATPG methods. We recommend doing mock interviews with friends or using online resources to get comfortable discussing your experience and how it relates to the job.
✨Tip Number 3
Showcase your projects! If you've worked on relevant DFT projects, make sure to highlight them during interviews. We love seeing real-world applications of your skills, so be ready to discuss your contributions and the impact they had.
✨Tip Number 4
Apply through our website! It’s the best way to ensure your application gets noticed. We’re always on the lookout for talented DFT Engineers, so don’t hesitate to submit your application and let us know why you’d be a great fit for the team!
We think you need these skills to ace DFT Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the DFT Engineer role. Highlight your experience with DFT strategies, scan design, and ATPG. We want to see how your skills match what we're looking for!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about DFT and how your background makes you a perfect fit for our team. Keep it engaging and relevant to the job description.
Showcase Relevant Projects: If you've worked on projects involving DFT techniques or EDA tools like Mentor, make sure to mention them. We love seeing real-world examples of your work that align with our needs!
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it’s super easy!
How to prepare for a job interview at Qualitest
✨Know Your DFT Inside Out
Make sure you brush up on your knowledge of DFT strategies, especially scan design and ATPG. Be ready to discuss specific projects where you've implemented these techniques, as this will show your practical experience and understanding of the role.
✨Familiarise Yourself with EDA Tools
Since familiarity with tools like Mentor (Tessent) is preferred, it’s a good idea to review how you’ve used these tools in past projects. If you have any hands-on experience, be prepared to share examples of how you leveraged these tools to solve problems or improve processes.
✨Collaborate and Communicate
This role involves working closely with various engineering teams. Think of examples where you successfully collaborated with others, particularly in managing dependencies and ensuring DFT requirements were met. Highlight your communication skills and teamwork.
✨Prepare for Technical Questions
Expect technical questions related to DFT techniques, fault modelling, and silicon debug activities. Review common interview questions in this area and practice articulating your thought process clearly. This will help you demonstrate your expertise and problem-solving abilities.