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- Tasks: Develop and execute DFT strategies for innovative silicon solutions in a fast-paced environment.
- Company: Join a leading tech company known for its cutting-edge technology and collaborative culture.
- Benefits: Remote work, competitive salary, and opportunities for professional growth.
- Other info: Exciting projects with excellent career advancement opportunities in a supportive environment.
- Why this job: Be part of a dynamic team delivering high-quality silicon solutions that make a real impact.
- Qualifications: Bachelor's degree in engineering or equivalent experience; DFT design and verification skills required.
The predicted salary is between 60000 - 80000 £ per year.
We’re looking for multiple experienced DFT Engineers to join a cutting-edge programme with one of the world’s largest and most innovative technology companies, working remotely in the UK. This role focuses on developing and executing DFT strategies including scan design, ATPG, and verification, collaborating with world-class engineering teams to deliver high-quality silicon solutions in a fast-paced ASIC/SoC environment.
Job responsibilities:
- Develop DFT strategy for hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
- Perform ATPG, scan coverage debug and drive design fixes for coverage and quality improvements.
- Perform scan verification at RTL and gate level.
- Prepare scan content and deliverables for Silicon Engineering execution.
- Debug scan patterns on tester per requirement.
- Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT Scan requirements are met and mutual dependencies are managed.
Minimum qualifications:
- Bachelor’s degree in electrical engineering, Computer Engineering, or a related field, or equivalent practical experience.
- Experience with multiple projects in DFT scan design and verification.
- Experience with DFT techniques and tools, ASIC DFT synthesis, simulation, and verification flow.
- Experience in Automatic Test Pattern Generation (ATPG) methods.
Preferred qualifications:
- Familiar with EDA tools like mentor (Tessent) from Siemens.
- Master’s degree in electrical engineering.
- Experience in IP integration (e.g., memories, test controllers, Test Access Point (TAP), and Memory Built-In Self-Test (MBIST).
- Experience in fault modelling.
- Experience in SoC cycles, including silicon bring up and silicon debug activities.
- Experience working with ATE engineers (e.g., silicon bring-up, patterns generation, debug, validation on automatic test equipment, debug of silicon issues).
DFT Engineer employer: Qualitest Group
Contact Detail:
Qualitest Group Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land DFT Engineer
✨Network Like a Pro
Get out there and connect with folks in the industry! Attend virtual meetups, webinars, or even local tech events. The more people you know, the better your chances of landing that DFT Engineer role.
✨Show Off Your Skills
When you get the chance to chat with potential employers, don’t hold back! Share specific examples of your DFT strategies and successes. Let them see how your experience aligns perfectly with their needs.
✨Tailor Your Approach
Every company is different, so make sure you tailor your conversations to fit their vibe. Research their projects and challenges, and come prepared with ideas on how you can contribute as a DFT Engineer.
✨Apply Through Our Website
Don’t forget to apply through our website! It’s the best way to ensure your application gets noticed. Plus, we love seeing candidates who are proactive about their job search!
We think you need these skills to ace DFT Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the DFT Engineer role. Highlight your experience with DFT strategies, scan design, and ATPG. We want to see how your skills match what we're looking for!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about DFT and how your background makes you a perfect fit for our team. Keep it engaging and relevant to the job description.
Showcase Relevant Projects: When listing your experience, focus on projects that demonstrate your expertise in DFT techniques and tools. We love seeing real-world applications of your skills, so don’t hold back!
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for this exciting opportunity with us at Qualitest!
How to prepare for a job interview at Qualitest Group
✨Know Your DFT Inside Out
Make sure you brush up on your knowledge of DFT strategies, especially scan design and ATPG. Be ready to discuss specific projects where you've implemented these techniques, as this will show your practical experience and understanding of the role.
✨Collaborate Like a Pro
Since this role involves working with various engineering teams, think of examples where you've successfully collaborated in the past. Highlight how you managed dependencies and ensured that DFT requirements were met, as teamwork is key in this fast-paced environment.
✨Prepare for Technical Questions
Expect some deep technical questions related to DFT techniques and tools. Review your experience with EDA tools like Mentor (Tessent) and be prepared to explain your approach to scan verification at both RTL and gate levels.
✨Show Your Problem-Solving Skills
Be ready to discuss how you've debugged scan patterns or improved coverage and quality in previous projects. Sharing specific examples of challenges you've faced and how you overcame them will demonstrate your analytical skills and resourcefulness.