IC Package Design Engineer in Cambridge

IC Package Design Engineer in Cambridge

Cambridge Full-Time 50000 - 70000 Β£ / year (est.) No working from home possible
Qualcomm

At a Glance

  • Tasks: Responsible for package design, layout optimization, and collaboration with multi-functional teams.
  • Company: Qualcomm's Central Hardware Systems Team focuses on innovative IC package products.
  • Benefits: Enjoy salary, stock bonuses, education assistance, and subsidised gym membership.
  • Other info: Experience with Cadence Allegro tools and high-speed IO interfaces is essential.
  • Why this job: Join a collaborative team driving innovations in package design and methodology.
  • Qualifications: Bachelor's degree in Engineering or related field; Master's or PhD preferred.

The predicted salary is between 50000 - 70000 Β£ per year.

The Central Hardware Systems Team at Qualcomm has an opening for an IC Package Design Engineer. The team is responsible for road mapping, architecting, design methodology, design implementation, and verification for all Qualcomm package products.

Principal Duties and Responsibilities will include:

  • Responsible for Package/SIP physical design and layout, optimization, DV, and tape out.
  • Work with multi-functional teams to achieve optimized mechanical, electrical RF & SI/PI, and thermal performance for various classes of chips.
  • Work with IC Physical Design team on top level floor planning including hard macro block placement, Redistribution Layer, and bump/ball pattern/assignment.
  • Drive methodology, innovations, and efficiency improvements in package design together with vendors and developers on feature development and bug resolution.
  • Explore, evaluate, and develop new CAD tools, design, and verification flows.
  • Work with marketing/IC/product teams on competitive analysis and road mapping package technology for future products.

Minimum Qualifications:

  • Bachelor's degree in Science, Engineering, or related field.
  • Bachelor's degree in Science, Engineering, Material Science or related field.

Preferred Qualifications:

  • Master's degree or PhD in Electronic Engineering, Material Science, or related field.
  • Basic knowledge in high-speed IO interfaces and electromagnetic field.
  • Knowledge of IC packaging structures and package-board interaction.
  • Basic knowledge of electronic packaging process and typical failure modes preferred.
  • Proven fundamentals in electrical, material, thermal, or mechanical engineering fields.
  • Familiarity with various sophisticated package configurations and assembly/substrate technology (Flip chip BGA, 2.5D/3D Interposer, etc.).
  • Experience in package design and proficiency in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP).
  • Basic understanding of some SI/PI tools (XtractIM, PowerSI, HFSS, Q3D, etc.), package model extraction, S-parameters, and RLGC model.
  • Basic knowledge of substrate manufacturing process, structure, design rules, and material properties.
  • Proven understanding of RF and high-speed interfaces, including DDR, PCIe, UCIE, etc.
  • Experience with Calibre tool and package design reviews.
  • Knowledge of high-speed layout constraints (crosstalk mitigation, differential pairs).
  • Solid understanding of Design Rules Check and Design for Manufacturing.
  • Experience with 2.5D Si-Bridge design in Virtuoso or similar CAD tools is a plus.

What's on Offer:

  • Salary, stock and performance related bonus
  • Maternity/Paternity Leave
  • Employee stock purchase scheme
  • Matching pension scheme
  • Education Assistance
  • Relocation and immigration support
  • Life, Medical, Income and Travel Insurance
  • Subsidised gym membership
  • Bicycle purchase scheme

References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process.

IC Package Design Engineer in Cambridge employer: Qualcomm

Qualcomm offers a relaxed and collaborative work environment in San Diego. Employees benefit from a matching pension scheme and comprehensive insurance coverage. The team is dedicated to advancing package technology for future products.

Qualcomm

Contact Details:

Qualcomm Recruitment Team

We think you need these skills to ace IC Package Design Engineer in Cambridge

IC Package Design
Physical Design and Layout
Mechanical Performance Optimisation
Electrical RF & SI/PI Performance
Thermal Performance Analysis
Top Level Floor Planning
Redistribution Layer Design