CPU Design Verification Engineer (Senior level) - Cambridge, UK

Qualcomm's largest UK office is located in Cambridge and houses approximately 400 team members, including engineers, business strategists, and support staff. Our engineering teams focus on RF and PMU analog design, digital design & verification, digital physical design, embedded software, packaging, and post‑silicon validation. We target products such as high‑performance CPUs, GPUs, ultra‑low‑power IoT devices, and wearables including smart glasses, smart watches, and earbuds.

Please note this role requires you to work onsite 5 days per week in our Cambridge office.

As a CPU Verification Engineer, Senior, you will work with chip architects to validate CPU and SOC‑level micro‑architectures, ensuring that selected parts of the CPU design are launch‑ready.

What will you be doing?

• Work with CPU and SOC architects to understand concepts and high‑level system requirements.
• Develop detailed test and coverage plans based on architecture and micro‑architecture.
• Create verification methodology, ensuring scalability and portability across environments.
• Build verification environment components, including stimulus, checkers, assertions, trackers, and coverage.
• Produce verification plans and testbenches for your functional domain.
• Execute verification plans, manage design bring‑up, DV environment bring‑up, regressions, enable all features under your care, and debug test failures.
• Track and report DV progress using metrics such as bugs and coverage.

What are we looking for?

• Deep knowledge of micro‑processor verification functions and architectures (e.g., cache coherence, memory ordering, prefetching, branch prediction, renaming, speculative execution, address translation, memory management).
• Experience with random instruction sequencing and block‑level, subsystem‑level, and chip‑level testing.
• Leadership experience managing a small team of verification engineers.
• Advance techniques such as formal verification, assertions, and silicon bring‑up (helpful).
• In‑depth knowledge of micro‑processor functions, architectures, and micro‑architectures.
• Proficiency in writing test plans, portable testbenches, transactors, and assembly code.
• Familiarity with verification methodologies and tools (simulators, coverage collection, gate‑level simulation, waveform viewers, formal proof tools).
• Ability to develop and work independently on a block or unit of the design.

What's on Offer

• Salary, stock, and performance‑related bonus
• Maternity/Paternity leave
• Employee stock purchase scheme
• Matching pension scheme
• Education assistance
• Relocation and immigration support (if required)
• Life, medical, income, and travel insurance
• Subsidised memberships for physical and mental well‑being
• Bicycle purchase scheme
• Employee‑run clubs (running, football, chess, badminton, and more)

Minimum Qualifications

• Bachelor's degree in science, engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in science, engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
• Ph.D. in science, engineering, or related field.

References to a particular number of years of experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal‑opportunity employer. If you are an individual with a disability and need an accommodation during the application or hiring process, Qualcomm is committed to providing an accessible process. For assistance, contact disability-accommodations@qualcomm.com. If you would like more information about this role, please contact Qualcomm Careers.