Senior Physical Design (ASIC) Engineer Engineering · Cambridge ·

We have a fantastic new opportunity in our IC Design Team for a Senior Physical Design Engineer! Forming a key part of our expanding Engineering function, this is a critical role which will have a high impact on the development of our next generation of products. Reporting to the Principal Engineer/Manager - Digital IC Design, you will have responsibility for technical ownership of digital implementation for our mixed-signal and RF semiconductor products; and will contribute directly to the company's core research, development, and commercial manufacturing activities.

We are looking for candidates with significant experience in Physical and Digital ASIC design, as well as the ability to collaborate cross-functionally in a highly effective manner. This is a vital role in a high-performing and supportive team, with the opportunity to learn/develop and make significant contributions. We are able to offer Visa sponsorship and relocation assistance for this role. Ideally you will be based (or will be able to be based) in Cambridge, although we are happy to consider hybrid/remote applications, providing you are based in the UK.

• Design and implement digital IC architectures at block and chip level for mixed-signal and RF applications
• Perform physical design activities, including floor-planning, placement, clock tree synthesis (CTS), routing, and timing closure
• Develop, maintain, and optimise digital design flows and methodologies to ensure efficient and consistent design delivery
• Analyse and resolve complex technical issues relating to performance, timing, power, and manufacturability
• Collaborate with cross-functional teams (including analogue, RF, process, and product engineering) to ensure successful integration and delivery of semiconductor products
• Document design processes, methodologies, and results in accordance with engineering and regulatory standards
• Actively participate in design reviews and sign-off processes

Bachelor’s/Master's Degree (or equivalent) in Electronics Engineering, Electrical Engineering, or a closely related discipline would be preferred; or equivalent professional experience that demonstrates advanced knowledge and expertise in ASIC design.

Essential:

• In-depth knowledge of digital ASIC design flows and methodologies, including:
• Logic synthesis
• Place and route
• Clock tree synthesis (CTS)
• Parasitic extraction
• Static timing analysis (STA) and timing closure
• Proven experience using industry-standard Electronic Design Automation (EDA) tools (e.g., Cadence, Synopsys, Siemens EDA)
• Ability to apply advanced engineering principles to solve complex technical problems
• Strong written and verbal communication skills
• Ability to work independently and collaboratively within multidisciplinary engineering teams

Desirable:

• Simulation and verification
• Power analysis
• Design-for-Test (DFT)
• Experience in specifying, establishing, and maintaining digital design flows
• Proficiency in scripting/programming languages (e.g., Python, Shell)
• Experience with full-custom IC design techniques

Pragmatic Semiconductor is committed to equity, equality, diversity, and inclusion; we strive to welcome everyone and create inclusive teams. We celebrate difference and encourage everyone to be themselves at work. Please let us know if you would like any adjustments to our application and interview process.