Senior FPGA Engineer

Senior FPGA Engineer

Department

Engineering

Employment Type

Full Time

Location

• Oxford
• Description

We are looking for a Senior FPGA Engineer to architect, design, implement, and verify FPGA RTL for our optical interconnect development.

The work centres on high-speed digital logic, video processing and framing, high-speed serial interfaces, and the on-chip logic that connects our electronics to optical devices.

This is a focused, senior RTL role that runs from architecture and RTL design through simulation, verification, and timing closure to FPGA bring-up and characterisation on the bench.

You will own the FPGA design end to end and set the RTL standard for others to follow.

You will work closely with the electronics, RF, and photonics engineers who design the surrounding hardware and optical interfaces.

Key Responsibilities

• Architect, design, implement, and verify FPGA RTL for high-speed digital, video, and optical-interfacing systems.
• Develop FPGA designs in VHDL or Verilog/System Verilog, including high-speed serial interfaces, video processing, framing, and on-chip instrumentation.
• Bring up and configure high-speed serial transceivers and clock-data recovery, and implement line coding, pattern generation, and error-rate instrumentation.
• Design digital video interfaces and the associated framing, timing, and data-handling logic.
• Develop functional verification: testbenches, simulation, and timing closure across multiple clock domains.
• Lead FPGA bring-up, debug, and on-board validation, resolving issues across the hardware and firmware boundary.
• Author and maintain RTL documentation, verification evidence, and coding standards, and contribute to design reviews.
• Collaborate across electronics, RF, photonics, and systems engineering, and support the path from prototype to product.

Skills, Knowledge and Expertise

• Degree (BEng/MEng) or Ph D in Electronic Engineering, Computer Engineering, Physics, or a related field, with substantial relevant experience at senior level.
• Strong FPGA RTL design in VHDL or Verilog/System Verilog.
• High-speed serial transceiver and clock-data-recovery bring-up, and serial protocols such as line coding and PRBS.
• Functional verification: testbench development, simulation, and timing closure.
• Sound clock-domain-crossing and high-speed digital design discipline.
• Digital video interfacing (for example HDMI) or comparable high-bandwidth digital protocols.
• FPGA toolchain proficiency, and a willingness to work across vendor toolchains as required.
• Advantage
• Schematic capture and high-speed PCB design using e CAD tools such as Altium.
• Knowledge of high-speed PCB layout techniques: controlled impedance, differential routing, length/skew matching, and power integrity.
• Signal-integrity simulation (for example Hyper Lynx, Ansys SI, ADS, or similar).
• Electronic interfacing to optical or other sensor/transducer devices.
• Test-and-measurement awareness — eye diagrams, error-rate measurement, and high-speed serial debug.
• A proven track record of delivering FPGA firmware into a product.

Benefits

• Pension scheme
• Private medical & dental insurance
• 28 days’ holiday + bank holidays
• Relocation support
• Visa support available
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