Platform Recruitment in Cambridge is seeking a Senior FPGA Engineer to join a global team developing ultra-low latency technology. You will oversee FPGA system design from architecture to verification, enabling the next generation of infrastructure. The role requires deep hands-on RTL design experience, SystemVerilog expertise, and proficiency with Vivado or Quartus. You will collaborate across firmware, software, and infrastructure teams to optimise performance and mentor other engineers. #J-18808-Ljbffr
Senior FPGA Engineer — Ultra-Low Latency Systems Lead employer: Platform Recruitment
As a leading employer in the graphics and engineering computing sector, we offer an innovative work culture that fosters collaboration and creativity. Our commitment to employee growth is evident through tailored development programmes and opportunities to lead impactful projects, making this role not just a job, but a pathway to a rewarding career. Located in a vibrant tech hub, our team enjoys a dynamic environment with access to cutting-edge resources and a supportive community.
