At a Glance
- Tasks: Join a team to verify complex low-latency FPGA systems and develop robust testbenches.
- Company: Prestigious high-frequency trading company at the forefront of innovation.
- Benefits: Competitive salary, dynamic work environment, and opportunities for professional growth.
- Other info: Collaborative culture with a focus on pushing the envelope in design verification.
- Why this job: Work with top pioneers in verification and make a real impact in technology.
- Qualifications: Strong debugging skills, proficiency in Python, and experience in RTL functional verification.
The predicted salary is between 60000 - 80000 £ per year.
We're working with one of the most prestigious high-frequency trading companies in the world to find a verification engineer to help verify their complex low-latency FPGA systems. You'll be joining a team at the forefront of innovation in design verification, where you'll be supported in pushing the envelope alongside top pioneers in verification.
Responsibilities
- Design and maintain robust testbenches and targeted tests using the organisation’s mixed open-source and proprietary verification environment.
- Develop and own comprehensive verification plans, ensuring coverage goals and test strategies are clear and defensible.
- Identify and diagnose RTL issues quickly, working directly with designers to accelerate bring-up and resolve design defects efficiently.
- Oversee and refine the test infrastructure, including management of test suites, CI pipelines, and the improvement of both internal and open-source tooling.
Requirements
- Strong debugging and analytical capability, able to isolate and resolve complex RTL and testbench issues efficiently.
- Proficiency in Python for building verification infrastructure, tooling, and automation - beyond simple scripts.
- At least two years of professional RTL functional verification experience for FPGA or ASIC designs.
- Hands-on expertise in SystemVerilog and UVM, including stimulus development and code/functional coverage collection and analysis.
- Experience with cocotb desirable.
Design Verification Engineer in Nottingham employer: Platform Recruitment
Contact Detail:
Platform Recruitment Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Design Verification Engineer in Nottingham
✨Tip Number 1
Network like a pro! Reach out to folks in the industry, attend meetups, and connect with current employees at the company you're eyeing. A friendly chat can sometimes open doors that applications alone can't.
✨Tip Number 2
Show off your skills! If you’ve got a portfolio or any projects that highlight your design verification prowess, make sure to share them during interviews. It’s a great way to demonstrate your hands-on experience and problem-solving abilities.
✨Tip Number 3
Prepare for technical interviews by brushing up on your debugging and analytical skills. Practice common RTL issues and be ready to discuss how you’d tackle them. We want to see your thought process in action!
✨Tip Number 4
Don’t forget to apply through our website! It’s the best way to ensure your application gets noticed. Plus, we love seeing candidates who take that extra step to engage with us directly.
We think you need these skills to ace Design Verification Engineer in Nottingham
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the Design Verification Engineer role. Highlight your experience with RTL verification, SystemVerilog, and any relevant projects that showcase your skills in debugging and testbench development.
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about design verification and how your background aligns with the responsibilities outlined in the job description. Be genuine and let your personality come through.
Showcase Your Technical Skills: Don’t forget to emphasise your proficiency in Python and any experience you have with cocotb. Mention specific tools or projects where you've applied these skills, as this will demonstrate your hands-on expertise to us.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it shows you’re keen on joining our innovative team!
How to prepare for a job interview at Platform Recruitment
✨Know Your Tech Inside Out
Make sure you brush up on your knowledge of SystemVerilog, UVM, and Python. Be ready to discuss how you've used these tools in past projects, especially in relation to FPGA or ASIC designs. The more specific examples you can provide, the better!
✨Prepare for Problem-Solving Questions
Expect to face some tricky debugging scenarios during the interview. Practice explaining your thought process when isolating and resolving RTL issues. This will showcase your analytical skills and demonstrate how you approach complex problems.
✨Showcase Your Experience with Testbenches
Be prepared to talk about your experience designing and maintaining testbenches. Highlight any robust verification plans you've developed and how you ensured coverage goals were met. This is a key part of the role, so make it count!
✨Ask Insightful Questions
At the end of the interview, don’t shy away from asking questions about the team’s current projects or challenges they face in verification. This shows your genuine interest in the role and helps you understand if it's the right fit for you.