Senior Digital Design Engineer — Cambridge, UK
Senior Digital Design Engineer — Cambridge, UK

Senior Digital Design Engineer — Cambridge, UK

Cambridge Full-Time 36000 - 60000 £ / year (est.) No home office possible
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At a Glance

  • Tasks: Design and verify cutting-edge digital systems for Wi-Fi 6 chipsets.
  • Company: Fast-growing semiconductor company in Cambridge, UK.
  • Benefits: Competitive salary, collaborative environment, and opportunities for professional growth.
  • Why this job: Join a dynamic team and shape the future of wireless communications.
  • Qualifications: Bachelor's in electronic engineering; Verilog/VHDL coding skills required.
  • Other info: Exciting projects with excellent career advancement potential.

The predicted salary is between 36000 - 60000 £ per year.

Palma Ceia SemiDesign (PCS), is a fast‑growing, fabless semiconductor company, focused on developing highly integrated Wi‑Fi 6 chipsets. We require senior digital design engineers to join our team of experienced design engineers in Cambridge, UK. Successful candidates will have proven knowledge and experience of specifying, implementing and verifying digital sub‑systems within SoCs, preferably including SoCs for wireless communications.

Other duties may be assigned.

Essential Duties And Responsibilities

  • Specification, architectural design, RTL design and verification of digital blocks within a complex mixed‑signal SoC.
  • Contribution to overall system architecture and design of the digital part of a mixed‑signal SoC.
  • Close collaboration with other IC design disciplines: analogue and RF design, DSP design and software development.

Skills And Experience

  • Bachelor’s degree in electronic engineering or a related subject
  • Proficient in coding Verilog/VHDL for efficient, synthesisable RTL
  • Proficient in using scripting languages e.g. perl, bash, tcl etc.
  • Proven ability to implement a variety of components of a typical digital system, e.g. processor and memory interfaces, host interfaces, etc.
  • Familiarity with design for test and synthesis
  • Familiarity with developing low‑level C software for test purposes

Desirable Experience

  • Masters degree or higher
  • RTL implementation of hardened modem functionality e.g. digital filters, Viterbi decoder, AGC control, pre‑distortion, etc.
  • Proficient in the use of Matlab for system modelling and simulation
  • Proficient in using digital DFT and synthesis tools
  • Proficient in using FPGA test environments for design verification
  • Proficient in C software
  • Knowledge of digital system requirements for existing Radio Standards, preferably to include WiFi

Attributes

  • Good written and verbal communication skills
  • Strong team‑player
  • Can‑do attitude
  • Mind‑set to produce high quality, maintainable designs
  • A willingness to get involved in whatever needs doing

Additional Information

  • Job Site: Cambridge, UK
  • Email resumes to: careers@pcsemi.com.
  • No calls. EOE.

Senior Digital RTL2GDSII Implementation Engineer

Senior Analogue and RF Laboratory Characterisation Engineer

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Senior Digital Design Engineer — Cambridge, UK employer: Palma Ceia SemiDesign

Palma Ceia SemiDesign offers an exceptional work environment for Senior Digital Design Engineers in Cambridge, UK, where innovation meets collaboration. With a strong focus on employee growth, PCS provides opportunities for professional development and encourages a culture of teamwork and high-quality design. The company's commitment to cutting-edge technology and its supportive atmosphere make it an ideal place for engineers looking to make a meaningful impact in the semiconductor industry.
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Contact Detail:

Palma Ceia SemiDesign Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land Senior Digital Design Engineer — Cambridge, UK

Tip Number 1

Network like a pro! Reach out to your connections in the semiconductor industry, especially those who work at Palma Ceia SemiDesign. A friendly chat can sometimes lead to job opportunities that aren’t even advertised.

Tip Number 2

Show off your skills! Prepare a portfolio showcasing your best digital design projects. When you get the chance to meet with potential employers, having tangible examples of your work can really set you apart from the crowd.

Tip Number 3

Ace the interview! Research common interview questions for digital design engineers and practice your answers. Be ready to discuss your experience with Verilog/VHDL and how you’ve tackled challenges in past projects.

Tip Number 4

Apply through our website! We love seeing applications directly from candidates who are genuinely interested in joining our team. It shows initiative and enthusiasm, which are always a plus in our books!

We think you need these skills to ace Senior Digital Design Engineer — Cambridge, UK

Digital Design Engineering
RTL Design
Verilog
VHDL
Scripting Languages (Perl, Bash, Tcl)
Digital System Implementation
Design for Test (DfT)
Low-Level C Software Development
Matlab for System Modelling and Simulation
FPGA Test Environments
Communication Skills
Team Collaboration
High-Quality Design Mindset
Adaptability

Some tips for your application 🫡

Tailor Your CV: Make sure your CV is tailored to the role of Senior Digital Design Engineer. Highlight your experience with digital sub-systems and any relevant projects you've worked on, especially those involving SoCs for wireless communications.

Showcase Your Skills: Don’t just list your skills; demonstrate them! Include specific examples of your proficiency in Verilog/VHDL and any scripting languages you’ve used. This will help us see how you can contribute to our team.

Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about digital design and how your background aligns with our needs at Palma Ceia SemiDesign. Keep it concise but impactful.

Apply Through Our Website: We encourage you to apply through our website for a smoother application process. It helps us keep track of your application and ensures you don’t miss out on any important updates!

How to prepare for a job interview at Palma Ceia SemiDesign

Know Your Stuff

Make sure you brush up on your Verilog and VHDL skills. Be ready to discuss specific projects where you've implemented digital sub-systems, especially in SoCs for wireless communications. This will show that you not only understand the theory but have practical experience too.

Show Off Your Collaboration Skills

Since this role involves close collaboration with other IC design disciplines, be prepared to share examples of how you've worked effectively in a team. Highlight any experiences where you’ve peer-reviewed colleagues’ work or collaborated with analogue and RF design teams.

Prepare for Technical Questions

Expect technical questions related to system architecture and design. Brush up on your knowledge of digital systems, including processor and memory interfaces. Being able to explain your thought process during the design and verification phases will impress the interviewers.

Demonstrate Your Can-Do Attitude

PCS values a strong team player with a can-do attitude. Be ready to discuss times when you took initiative or went above and beyond in your previous roles. This will help convey that you're not just looking for a job, but are genuinely interested in contributing to the team.

Senior Digital Design Engineer — Cambridge, UK
Palma Ceia SemiDesign
Location: Cambridge
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