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- Tasks: Design and execute high-speed analog layouts for cutting-edge optical processors.
- Company: Flux Computing creates innovative optical processors for AI model training and inference.
- Benefits: Enjoy a fast-paced environment with exciting benefits and opportunities for growth.
- Why this job: Be part of a dynamic team pushing the limits of AI technology and innovation.
- Qualifications: 7+ years in custom analog/RF IC layout with expertise in Cadence tools and automation.
- Other info: Frequent travel between Austin and London offices is expected.
The predicted salary is between 48000 - 84000 ÂŁ per year.
Join to apply for the Senior Physical Layout Engineer role at Flux Computing
Join to apply for the Senior Physical Layout Engineer role at Flux Computing
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Flux Computing designs and manufactures optical processors to train and run inference on large AI models. Join us to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at speed.
The Role
We are seeking a Physical Layout Engineer to own the full‑custom layout of ultra‑high‑speed analog blocks that lie at the heart of the OTPU including: high speed DAC/ADC/TIAS, sub‑100 fs‑rms jitter PLLs and large multi-lane clock‑distribution meshes.
You will translate transistor‑level intent into silicon‑accurate geometry, balancing dense floorplans with the exacting parasitic, symmetry and matching constraints that high‑frequency analog demands.
Responsibilities
- Plan, execute and sign‑off full‑custom layouts for high‑speed analog/RF IP (TIAs, PLLs, CDRs, drivers, samplers, bias networks, ESD clamps).
- Drive floorplanning and top‑level integration, coordinating power‑grid, clock‑mesh and micro‑bump/flip‑chip escape routing so 100 + channels meet skew and return‑loss targets.
- Perform parasitic extraction and EM/IR, thermal and electro‑migration analysis (Cadence Quantus / Calibre xRC, Voltus, EMX / HFSS), iterate with circuit designers to close speed, noise and phase‑noise margins.
- Optimise critical paths for minimal capacitance and series inductance: shielded differential pairs, common‑centroid devices, guard rings, stitching vias and low‑impedance return paths.
- Ensure all blocks pass sign‑off: DRC, LVS, ERC, ESD, latch‑up, DFM and foundry‑specific reliability checks.
- Collaborate with packaging and signal‑integrity teams to co‑design interposer, substrate and PCB break‑outs; model bond‑wire / micro‑bump parasitics in the extraction flow.
- Create and maintain layout guidelines, checklists and Skill/Tcl/Python automation scripts; mentor junior layout engineers and review their work.
Skills & Experience
Demonstrated ability to close sub‑pF capacitance budgets and < 5 mΩ series resistance on critical nets through careful geometry selection and EM‑aware verification.
Frequent travel is expected between our Austin and London offices.
We’re building fast and that includes our benefits. More exciting additions are coming soon for the Flux crew.
If you are passionate about pushing the boundaries of what\’s possible in AI and thrive in a high-energy, fast-paced environment, we want to hear from you. Apply now to join Flux and be a key player in shaping the future of computing.
Seniority level
-
Seniority level
Mid-Senior level
Employment type
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Employment type
Full-time
Job function
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Job function
Engineering and Information Technology
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Industries
Semiconductor Manufacturing
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Senior Physical Layout Engineer employer: PageBolt WordPress
Contact Detail:
PageBolt WordPress Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior Physical Layout Engineer
✨Tip Number 1
Familiarise yourself with the latest advancements in high-speed analog and RF IC layout. Understanding the nuances of technologies like flip-chip and micro-bump integration will give you an edge during discussions with the hiring team.
✨Tip Number 2
Network with current or former employees at Flux Computing through platforms like LinkedIn. Engaging with them can provide insights into the company culture and expectations, which can be invaluable during your interview.
✨Tip Number 3
Prepare to discuss specific projects where you've successfully managed full-custom layouts. Highlighting your experience with Cadence tools and your ability to optimise critical paths will demonstrate your technical expertise.
✨Tip Number 4
Showcase your collaboration skills by preparing examples of how you've worked with cross-functional teams. Being able to communicate effectively with circuit designers and packaging teams is crucial for this role.
We think you need these skills to ace Senior Physical Layout Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights relevant experience in custom analog/RF IC layout, particularly with high-speed analog blocks. Emphasise any projects that involved DAC/ADC/TIAS or PLLs, and quantify your achievements where possible.
Craft a Compelling Cover Letter: In your cover letter, express your passion for AI and semiconductor technology. Mention specific experiences that align with the responsibilities listed in the job description, such as floorplanning and integration, and how you can contribute to the team at Flux Computing.
Showcase Technical Skills: Highlight your proficiency with Cadence Virtuoso and other relevant tools in your application. Provide examples of how you've used these tools to solve complex layout challenges, especially in high-frequency analog designs.
Demonstrate Collaboration Experience: Flux Computing values teamwork, so include examples of how you've successfully collaborated with circuit designers, packaging teams, and signal integrity teams in past roles. This will show that you can thrive in their fast-paced environment.
How to prepare for a job interview at PageBolt WordPress
✨Showcase Your Technical Expertise
Be prepared to discuss your experience with custom analog/RF IC layout in detail. Highlight specific projects where you successfully managed high-speed analog blocks and the tools you used, such as Cadence Virtuoso. This will demonstrate your capability to handle the technical demands of the role.
✨Understand the Company’s Vision
Research Flux Computing and their focus on optical processors for AI models. Understanding their mission and how your role as a Senior Physical Layout Engineer fits into their goals will show your genuine interest in the company and its future.
✨Prepare for Problem-Solving Questions
Expect questions that assess your problem-solving skills, especially regarding layout challenges like parasitic extraction and EM/IR analysis. Be ready to discuss how you've tackled similar issues in past projects and the outcomes of your solutions.
✨Demonstrate Collaboration Skills
Since the role involves working closely with circuit design, packaging, and signal integrity teams, be prepared to share examples of how you've effectively collaborated in cross-functional teams. Highlight your communication skills and any mentoring experiences with junior engineers.
