Contract FPGA Engineer

At OQC, we aren't just theorising about the future; we're building it.

Born from a philosophy of bold innovation, we've successfully transitioned quantum computing from an academic dream into a commercial reality.

Note this is a contract interim role for an initial duration of 6 months with a requirement to come to the Reading office 2 to 3 days per week.

The Role As a Contract FPGA Engineer, you'll be responsible for designing, implementing and verifying FPGA solutions for high-performance microwave and control applications.

Working closely with Embedded Software, Firmware and Hardware Engineers, you'll help deliver robust, scalable and maintainable FPGA architectures that support our quantum computing platforms.

What You’ll Be Working On Design, implement and verify complex FPGA logic using System Verilog for high-performance hardware applications.

Develop scalable RTL, high-speed interfaces and DSP pipelines for ADCs, DACs, memory devices and RF So C platforms.

Optimise FPGA designs for deterministic timing, timing closure, multi-clock domain synchronisation and resource utilisation.

Perform FPGA verification, debugging, laboratory integration and system-level validation against technical requirements.

Define communication, synchronisation and data transfer interfaces across distributed hardware systems.

Collaborate with cross-functional engineering teams and support supplier and external development activities where required.

Produce clear FPGA architecture, interface and implementation documentation to support traceability and long-term maintainability.

What We’re Looking For Commercial experience delivering complex FPGA design, verification and integration projects.

Strong System Verilog development experience for advanced FPGA applications.

Experience developing high-speed ADC, DAC and memory interfaces.

Proven expertise in deterministic timing, multi-clock domain design and synchronisation.

Strong understanding of FPGA architecture, RTL development and FPGA verification methodologies.

Experience with timing analysis, constraint definition and timing closure.

Experience implementing DSP algorithms on FPGA platforms.

Experience working with RF So C platforms and high-speed digital data transfer architectures.

Proficiency with Intel/Altera Quartus.

Experience using MATLAB or Simulink for DSP modelling.

Hands‑on laboratory debugging using oscilloscopes and spectrum analyzers.

Strong analytical, debugging and code review skills.

The ‘Nice‑to‑Haves’ Experience working on RF, microwave or other high-performance digital systems.

Experience contributing to supplier engagements or outsourced engineering activities.

Familiarity with distributed hardware systems and hardware/software integration.

Experience producing engineering documentation to support traceability and long-term product maintenance. #J-18808-Ljbffr