At a Glance
- Tasks: Collaborate with top engineers to develop and verify innovative micro-architectures.
- Company: Join Apple, a leader in technology and innovation.
- Benefits: Competitive salary, inclusive culture, and opportunities for growth.
- Other info: Dynamic environment with a focus on creativity and teamwork.
- Why this job: Be part of groundbreaking projects that impact millions worldwide.
- Qualifications: Experience in VLSI, digital logic design, and formal verification techniques.
The predicted salary is between 60000 - 84000 £ per year.
Summary
Imagine what you could do here.
At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly.
Bring passion and dedication to your job and there's no telling what you could accomplish.
Dynamic, smart people and inspiring, innovative technologies are the norm here.
The people who work here have reinvented entire industries with all Apple Hardware products powered by Apple Silicon.
The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it.
Join us to help deliver the next groundbreaking Apple product.
Do you have experience being at the center of a System-on-a-chip (So C) design verification effort collaborating with design?
Are you passionate about changing the world?
We have a critical impact on getting high quality functional products to millions of customers quickly and we are hiring all levels from junior to senior roles.
- Description
- Working with Apple's world‑class design engineers to develop a formal micro‑architecture specification.
- Formalizing the refinement from architecture to micro‑architecture.
- Developing a comprehensive formal verification test plan.
- Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro‑architecture.
- Crafting novel and creative solutions for verifying complex design micro‑architectures.
- Developing and implementing reusable and optimized formal models and verification code base.
- Architecting correct‑by‑construction design methodologies for improved formal verification efficiency and productivity.
- Minimum Qualifications
- Hands on experience with VLSI and digital logic design and verification techniques.
- Advanced knowledge of So C, CPU, GPU, or Cellular designs.
- Developed formal property proofs on industrial strength designs and architectures.
- Deep understanding of pipeline architectures, memory/DMA controllers, out‑of‑order and speculative instruction execution hardware, bus interconnects, and cache coherence mechanisms.
- Confirmed understanding of formal verification technologies/abstraction techniques.
- Knowledge and experience in interpreting hardware specifications and using temporal logic assertion‑based languages such as SVA or PSL.
- Experience in using EDA formal tools; tool development experience is a plus.
- Proficiency in any scripting language with excellent debugging skills.
- Extraordinary teammate with excellent interpersonal skills.
- Passionate about developing world‑class/innovative formal verification solutions.
- Understanding of application processors (CPU/GPU), their Instruction Set Architectures (ISA), Memory Consistency Models (MCM) or Cache Coherence protocols is desirable but not necessary.
- Exposure to ARM type architectures is desirable but not necessary.
- Preferred Qualifications
- Knowledge and experience in interpreting hardware specifications and using temporal logic assertion‑based languages such as SVA or PSL.
- BS / MS / Ph. D in EE or CS is required.
EEO Statement
At Apple, we are committed to treating all applicants fairly and equally.
As a registered Disability Confident employer, we will work with applicants to make any reasonable accommodations.
Apple will consider for employment all qualified applicants with criminal backgrounds in a manner consistent with applicable law.
Learn more.
#J-18808-Ljbffr
