At a Glance
- Tasks: Design and optimise digital IC layouts for cutting-edge semiconductor projects.
- Company: Global leader in semiconductor design with a strong focus on innovation.
- Benefits: Long-term contract stability, competitive pay, and hands-on experience.
- Why this job: Join a high-performing team and make an immediate impact in the tech world.
- Qualifications: Experience in digital IC layout and proficiency in Cadence tools.
- Other info: Collaborative environment with opportunities for professional growth.
The predicted salary is between 36000 - 60000 £ per year.
A global semiconductor design organisation is looking for an experienced Digital IC Layout Engineer to support high-volume, production silicon across advanced power and mixed-signal platforms. You’ll join a mature, well-established layout team working closely with ASIC and digital design engineers on complex SoCs, PMICs, and power management devices used in automotive, industrial, IoT, and data-centric applications. This is a hands-on layout role within a highly structured, best-practice-driven environment.
Key Responsibilities
- Digital and mixed-signal IC layout from schematic to tape-out
- Place & route, timing-driven layout, and constraint-based design
- DRC / LVS / ERC sign-off and layout optimisation
- Collaboration with ASIC, verification, and physical design teams
- Support silicon revisions, debug, and yield improvements
Required Experience
- Strong background in Digital IC Layout / Physical Design
- Experience using Cadence Virtuoso and/or Innovus
- Solid understanding of timing, clocking, scan chains, and constraints
- Familiarity with advanced verification flows (DRC/LVS/QRC/Calibre or similar)
- Ability to work on-site in Swindon
Why This Contract?
- Inside IR35 with long-term programme stability
- Work on shipping silicon generating real revenue
- Highly experienced leadership and established design processes
- Immediate impact within a high-performing layout organisation
If you’re a Digital IC Layout Engineer looking for a stable, technically strong contract within a world-class semiconductor environment, this is a great opportunity to step into. Apply now or message for a confidential discussion.
Digital IC Layout Engineer in Swindon employer: Octagon Group
Contact Detail:
Octagon Group Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Digital IC Layout Engineer in Swindon
✨Tip Number 1
Network like a pro! Reach out to your connections in the semiconductor industry, especially those who work with digital IC layout. A friendly chat can lead to insider info about job openings or even referrals that could give you an edge.
✨Tip Number 2
Show off your skills! Prepare a portfolio showcasing your previous projects in digital IC layout. Highlight your experience with Cadence Virtuoso and Innovus, as well as any successful collaborations with ASIC teams. This will make you stand out during interviews.
✨Tip Number 3
Be proactive! Don’t just wait for job postings; reach out directly to companies you’re interested in. Express your enthusiasm for their work in power management devices and ask if they have any upcoming opportunities. It shows initiative!
✨Tip Number 4
Apply through our website! We’ve got a streamlined application process that makes it easy for you to get your foot in the door. Plus, we love seeing candidates who take the time to apply directly with us.
We think you need these skills to ace Digital IC Layout Engineer in Swindon
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience in Digital IC Layout and any relevant tools like Cadence Virtuoso or Innovus. We want to see how your skills match the job description, so don’t be shy about showcasing your best bits!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you’re the perfect fit for our team and how your background aligns with the role. Keep it concise but impactful – we love a good story!
Show Off Your Projects: If you've worked on any cool projects related to digital or mixed-signal IC layout, make sure to mention them. We’re keen to see your hands-on experience and how you’ve tackled challenges in past roles.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the easiest way for us to get your application and ensures you’re considered for the role. Plus, it shows you’re serious about joining our awesome team!
How to prepare for a job interview at Octagon Group
✨Know Your Tools
Make sure you’re well-versed in the tools mentioned in the job description, like Cadence Virtuoso and Innovus. Brush up on your skills and be ready to discuss how you've used these tools in past projects.
✨Understand the Process
Familiarise yourself with the entire IC layout process from schematic to tape-out. Be prepared to explain your approach to timing-driven layout and constraint-based design, as this will show your depth of knowledge.
✨Collaboration is Key
Since this role involves working closely with ASIC and verification teams, think of examples where you’ve successfully collaborated with others. Highlight your communication skills and how they contributed to project success.
✨Prepare for Technical Questions
Expect technical questions related to DRC, LVS, and layout optimisation. Review common challenges faced in digital IC layout and be ready to discuss how you’ve tackled similar issues in your previous roles.