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For Companies At a Glance
- Tasks: Design and optimise digital IC layouts for cutting-edge semiconductor projects.
- Company: Global leader in semiconductor design with a strong focus on innovation.
- Benefits: Long-term contract, stable work environment, and immediate impact on real projects.
- Why this job: Join a high-performing team and contribute to advanced technology in various industries.
- Qualifications: Experience in Digital IC Layout and proficiency in Cadence tools required.
- Other info: On-site role in Swindon with opportunities for professional growth.
The predicted salary is between 48000 - 72000 £ per year.
A global semiconductor design organisation is looking for an experienced Digital IC Layout Engineer to support high-volume, production silicon across advanced power and mixed-signal platforms.
You’ll join a mature, well-established layout team working closely with ASIC and digital design engineers on complex SoCs, PMICs, and power management devices used in automotive, industrial, IoT, and data-centric applications. This is a hands-on layout role within a highly structured, best-practice-driven environment.
Key Responsibilities
- Digital and mixed-signal IC layout from schematic to tape-out
- Place & route, timing-driven layout, and constraint-based design
- DRC / LVS / ERC sign-off and layout optimisation
- Collaboration with ASIC, verification, and physical design teams
- Support silicon revisions, debug, and yield improvements
Required Experience
- Strong background in Digital IC Layout / Physical Design
- Experience using Cadence Virtuoso and/or Innovus
- Solid understanding of timing, clocking, scan chains, and constraints
- Familiarity with advanced verification flows (DRC/LVS/QRC/Calibre or similar)
- Ability to work on-site in Swindon
Why This Contract?
- Inside IR35 with long-term programme stability
- Work on shipping silicon generating real revenue
- Highly experienced leadership and established design processes
- Immediate impact within a high-performing layout organisation
If you’re a Digital IC Layout Engineer looking for a stable, technically strong contract within a world-class semiconductor environment, this is a great opportunity to step into. Apply now or message for a confidential discussion.
Digital IC Layout Engineer in Salisbury employer: Octagon Group
Contact Detail:
Octagon Group Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Digital IC Layout Engineer in Salisbury
✨Tip Number 1
Network like a pro! Reach out to your connections in the semiconductor industry, especially those who work with digital IC layout. A friendly chat can lead to insider info about job openings that aren't even advertised yet.
✨Tip Number 2
Show off your skills! Create a portfolio showcasing your best layout projects. When you get the chance to chat with potential employers, having tangible examples of your work can really set you apart from the crowd.
✨Tip Number 3
Prepare for interviews by brushing up on your technical knowledge. Be ready to discuss your experience with Cadence Virtuoso and Innovus, as well as your understanding of DRC/LVS flows. Confidence in your expertise will impress interviewers!
✨Tip Number 4
Don’t forget to apply through our website! We’ve got loads of opportunities waiting for talented Digital IC Layout Engineers like you. Plus, it’s a great way to ensure your application gets seen by the right people.
We think you need these skills to ace Digital IC Layout Engineer in Salisbury
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the Digital IC Layout Engineer role. Highlight your experience with Cadence Virtuoso and Innovus, and don’t forget to mention any relevant projects that showcase your skills in digital and mixed-signal IC layout.
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you’re the perfect fit for this role. Mention your hands-on experience and how you’ve collaborated with ASIC and verification teams in the past.
Showcase Your Technical Skills: In your application, be sure to highlight your technical skills, especially around DRC, LVS, and ERC sign-off processes. We want to see that you understand the nitty-gritty of layout optimisation and timing-driven design.
Apply Through Our Website: We encourage you to apply through our website for the best chance of getting noticed. It’s super easy, and you’ll be able to submit all your documents in one go. Plus, it helps us keep track of your application!
How to prepare for a job interview at Octagon Group
✨Know Your Tools
Make sure you're well-versed in the tools mentioned in the job description, like Cadence Virtuoso and Innovus. Brush up on your skills and be ready to discuss how you've used these tools in past projects.
✨Understand the Role
Familiarise yourself with digital and mixed-signal IC layout processes. Be prepared to talk about your experience with DRC, LVS, and ERC sign-off, as well as any optimisation techniques you've employed in previous roles.
✨Show Your Collaborative Spirit
This role involves working closely with ASIC and verification teams, so highlight your teamwork skills. Think of examples where you successfully collaborated on complex projects and how you contributed to the overall success.
✨Prepare for Technical Questions
Expect technical questions related to timing, clocking, and constraints. Review key concepts and be ready to explain your thought process when tackling layout challenges. This will show your depth of knowledge and problem-solving abilities.
