Senior Design Engineer - Digital (f/m/d)
Senior Design Engineer - Digital (f/m/d)

Senior Design Engineer - Digital (f/m/d)

Glasgow Full-Time 40000 - 60000 £ / year (est.) No home office possible
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At a Glance

  • Tasks: Design and verify digital logic for custom ASICs in a hands-on role.
  • Company: Neuranics is a pioneering semiconductor company based in Glasgow, focused on magnetic sensing solutions.
  • Benefits: Enjoy competitive salary, bonuses, share options, health insurance, and a friendly office vibe.
  • Why this job: Make a real impact on next-gen wearables and collaborate with top-tier tech companies.
  • Qualifications: BSc/MSc/PhD in Electrical Engineering or related field; 5+ years in ASIC/FPGA RTL design required.
  • Other info: VISA support available for the right candidate; must work on-site in Glasgow.

The predicted salary is between 40000 - 60000 £ per year.

Full Time | On-site Location: Glasgow, UK

Salary: £50 - 75k (depending upon experience)

VISA Support: Will be provided for the right candidate

Neuranics is a fast-growing fabless semiconductor company pioneering the future of magnetic sensing solutions. Based in Glasgow, we are developing cutting-edge Tunnelling Magnetoresistance (TMR) sensors that are enabling the next generation of wearables, XR, and advanced human-machine interaction.

As we push the boundaries of magnetic sensing, this role offers the opportunity to work on real innovations that will shape the future of sensing. You’ll be part of a fast-moving team developing technology that is unlocking new possibilities for next-generation devices, working closely with Tier 1 consumer electronics and semiconductor companies. This is a chance to make a real impact, tackling challenges and driving breakthrough solutions in exciting and rapidly evolving markets.

Job Summary:

As an RTL Design Engineer, you will be responsible for the design, implementation, and verification of digital logic for our custom ASICs for a state-of-the-art System-on-Chip for next-generation quantum sensing. You will work closely with analog designers, layout engineers, electronics engineers, and sensor experts to translate system-level requirements into efficient and reliable RTL using Verilog. The role is hands-on and will involve extensive work within the Cadence toolchain.

Key Responsibilities:

  • Develop synthesizable Verilog RTL for core digital blocks interfacing with TMR-based analog front ends and system controllers
  • Collaborate with the ASIC and sensor system designers to define block-level specifications
  • Perform RTL simulation and functional verification using Cadence tools
  • Support ASIC tape-out flow and post-silicon bring-up alongside test engineers
  • Contribute to system integration with embedded software and mixed-signal components
  • Document design specifications, verification plans, and testbench structures

Requirements:

  • BSc/MSc/PhD in Electrical Engineering, Computer Engineering, or related field
  • 5+ years of experience in ASIC/FPGA RTL design, preferably for low-power wearable or biomedical applications
  • Strong proficiency in Verilog HDL and digital design fundamentals
  • Understanding of RTL to GDS signoff flow (STA, clock tree synthesis, DFT etc.)
  • Hands-on experience with Cadence tools
  • Solid understanding of clock domain crossing, low-power design (UPF), and bus protocols
  • Strong documentation and communication skills, with the ability to engage with the wider ASIC and engineering teams as required
  • Self-motivated and adaptable, capable of working independently or within a team in a fast-paced environment
  • Ability to work on site in a Glasgow based facility.

Desirable:

  • Previous work with custom silicon for biosensors or MEMS/TMR-based systems
  • Experience with power and area optimization techniques for wearable devices
  • Exposure to mixed-signal simulation environments and AMS verification
  • Familiarity with firmware-hardware integration and embedded systems
  • Experience in integrating Arm processors and/or Bluetooth circuit blocks to the ASIC

Why Join Us?

Join a rapidly growing deep-tech company at the forefront of magnetic sensing solutions. At Neuranics, you’ll work on real-world innovations, collaborating with Tier 1 consumer electronics and semiconductor companies to shape the future of wearables, XR, and human-machine interaction.

You’ll be part of a fast-moving, collaborative team, developing groundbreaking technology and pushing the limits of what’s possible in sensing. If you’re looking to make a real impact, contribute to cutting-edge projects, and grow with a company leading the way in innovation, we want to hear from you.

What We Offer

  • Competitive Salary
  • Enhanced Annual Bonus Scheme
  • Share Options
  • Private Health Insurance
  • Life Insurance
  • Company Pension Scheme
  • Work on cutting-edge technology with a rapidly growing team
  • Friendly, fast-paced office environment

Apply via our website: [] or email info@neuranics.com with your CV and cover letter.

Senior Design Engineer - Digital (f/m/d) employer: Neuranics

Neuranics is an exceptional employer, offering a dynamic and collaborative work culture in the heart of Glasgow. With competitive salaries, enhanced bonuses, and comprehensive health benefits, we prioritise employee well-being and growth. Join us to work on groundbreaking technology in magnetic sensing solutions, where your contributions will directly impact the future of wearables and human-machine interaction.
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Contact Detail:

Neuranics Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land Senior Design Engineer - Digital (f/m/d)

✨Tip Number 1

Familiarise yourself with the latest advancements in Tunnelling Magnetoresistance (TMR) technology. Understanding the nuances of this field will not only help you during interviews but also demonstrate your genuine interest in the role and the company.

✨Tip Number 2

Network with professionals in the semiconductor industry, especially those who have experience with ASIC design and Cadence tools. Engaging with others in the field can provide valuable insights and potentially lead to referrals.

✨Tip Number 3

Prepare to discuss specific projects where you've successfully implemented Verilog RTL designs. Be ready to explain your thought process, challenges faced, and how you collaborated with other engineers, as teamwork is crucial for this role.

✨Tip Number 4

Stay updated on the latest trends in low-power design and wearable technology. Being knowledgeable about current market demands and innovations will help you stand out as a candidate who is not only skilled but also forward-thinking.

We think you need these skills to ace Senior Design Engineer - Digital (f/m/d)

Verilog HDL Proficiency
Digital Design Fundamentals
ASIC/FPGA RTL Design Experience
Low-Power Design Techniques
RTL to GDS Signoff Flow Knowledge
Cadence Toolchain Experience
Clock Domain Crossing Understanding
Bus Protocols Familiarity
Documentation Skills
Communication Skills
Self-Motivation
Adaptability
Team Collaboration
Problem-Solving Skills

Some tips for your application 🫡

Tailor Your CV: Make sure your CV highlights relevant experience in ASIC/FPGA RTL design, particularly for low-power wearable or biomedical applications. Emphasise your proficiency in Verilog HDL and any hands-on experience with Cadence tools.

Craft a Compelling Cover Letter: In your cover letter, express your passion for magnetic sensing solutions and how your background aligns with Neuranics' mission. Mention specific projects or experiences that demonstrate your ability to contribute to their innovative work.

Highlight Key Skills: Clearly outline your understanding of RTL to GDS signoff flow, clock domain crossing, and low-power design techniques. This will show that you possess the technical skills necessary for the role.

Showcase Collaboration Experience: Since the role involves working closely with various engineering teams, include examples of past collaborative projects. Highlight your communication skills and ability to engage with cross-functional teams effectively.

How to prepare for a job interview at Neuranics

✨Showcase Your Technical Skills

Be prepared to discuss your experience with Verilog HDL and digital design fundamentals. Highlight specific projects where you've developed synthesizable RTL, especially in low-power wearable or biomedical applications.

✨Understand the Company’s Vision

Research Neuranics and their cutting-edge TMR sensors. Understanding their role in the future of magnetic sensing solutions will help you align your answers with their goals and demonstrate your enthusiasm for the position.

✨Prepare for Collaboration Questions

Since the role involves working closely with various teams, be ready to discuss your experience in collaborative environments. Share examples of how you've successfully worked with analog designers, layout engineers, and test engineers in past projects.

✨Demonstrate Problem-Solving Abilities

Expect questions about challenges you've faced in previous roles, particularly related to ASIC design and verification. Prepare to explain your thought process and the steps you took to overcome these challenges, showcasing your adaptability and self-motivation.

Senior Design Engineer - Digital (f/m/d)
Neuranics
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  • Senior Design Engineer - Digital (f/m/d)

    Glasgow
    Full-Time
    40000 - 60000 £ / year (est.)

    Application deadline: 2027-05-28

  • N

    Neuranics

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