At a Glance
- Tasks: Join a team to develop and verify cutting-edge FPGA technology.
- Company: Be part of a leading tech company innovating in silicon IP solutions.
- Benefits: Enjoy hybrid working options and competitive hourly rates.
- Why this job: Work on exciting projects that shape the future of technology in a collaborative environment.
- Qualifications: Experience in FPGA/ASIC verification with skills in VHDL, Verilog, or SystemVerilog required.
- Other info: Remote work considered for the right candidate.
Location: North London, UK (Hybrid Preferred | Remote Considered)
Contract: Long-Term Contract | Outside IR35
Rate: Negotiable (Hourly)
About the Company
Join a cutting-edge technology company at the forefront of silicon IP innovation. Their solutions span compute, graphics, AI, communications, memory, and security—powering the next generation of high-performance systems across a diverse range of industries. With continued investment and rapid growth, the company is expanding its engineering teams and hiring multiple ASIC/FPGA professionals—from skilled developers to senior-level architects—across the UK.
Role Overview
We are seeking an experienced FPGA Verification Engineer to join a world-class team developing next-generation silicon IP. In this long-term contract role, you will be part of a collaborative, forward-thinking environment and contribute to technically challenging projects that shape the future of ASIC and SoC design. This role is based in Hemel Hempstead with hybrid working preferred. Fully remote options are available for the right candidate.
Key Responsibilities
- Develop and execute comprehensive FPGA verification plans
- Design and implement testbenches using SystemVerilog and UVM
- Collaborate closely with architects and design engineers to verify IP blocks and SoC-level functionality
- Contribute to verification strategy, methodology improvements, and tool flows
- Debug and resolve issues across simulation and emulation platforms
Essential Skills & Experience
We're looking for engineers with solid experience in FPGA/ASIC verification, ideally with exposure to advanced SoC projects. Key areas of expertise include:
- FPGA development using VHDL, Verilog, and/or SystemVerilog
- Strong experience with UVM (Universal Verification Methodology)
- Solid understanding of computer architectures (ARM or RISC-V)
- Experience with AXI, OCP, or similar interconnect protocols
- Hands-on experience with simulation tools (e.g., Questa, VCS, ModelSim)
- Ability to work effectively within a distributed global team
Desirable
- Scripting skills in Python, TCL, or Perl
- Familiarity with emulation platforms or FPGA prototyping
- Prior experience working on IP development for commercial silicon
Field-Programmable Gate Arrays Engineer employer: Microtech Global Ltd
Contact Detail:
Microtech Global Ltd Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Field-Programmable Gate Arrays Engineer
✨Tip Number 1
Network with professionals in the FPGA and ASIC fields. Attend industry meetups, webinars, or conferences to connect with potential colleagues and employers. This can help you gain insights into the company culture and job expectations.
✨Tip Number 2
Familiarise yourself with the latest trends and technologies in FPGA verification. Being knowledgeable about advancements in UVM, SystemVerilog, and simulation tools will not only boost your confidence but also impress interviewers.
✨Tip Number 3
Prepare to discuss specific projects you've worked on that relate to the job description. Highlight your experience with SoC design and any challenges you overcame, as this will demonstrate your problem-solving skills and technical expertise.
✨Tip Number 4
Showcase your collaborative skills by discussing how you've worked effectively within teams in previous roles. Emphasising your ability to communicate and collaborate with architects and design engineers will align well with the company's team-oriented environment.
We think you need these skills to ace Field-Programmable Gate Arrays Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights relevant experience in FPGA/ASIC verification. Emphasise your skills in VHDL, Verilog, SystemVerilog, and UVM, as well as any hands-on experience with simulation tools.
Craft a Strong Cover Letter: Write a cover letter that specifically addresses the key responsibilities and essential skills mentioned in the job description. Show your enthusiasm for the role and how your background aligns with the company's innovative projects.
Showcase Relevant Projects: If you have worked on specific FPGA or SoC projects, include them in your application. Detail your contributions and the technologies used, particularly focusing on any advanced SoC projects you've been involved in.
Proofread Your Application: Before submitting, carefully proofread your CV and cover letter for any errors or typos. A polished application reflects your attention to detail, which is crucial in engineering roles.
How to prepare for a job interview at Microtech Global Ltd
✨Showcase Your Technical Skills
Be prepared to discuss your experience with FPGA development, particularly in VHDL, Verilog, and SystemVerilog. Highlight specific projects where you've implemented verification plans or designed testbenches, as this will demonstrate your hands-on expertise.
✨Understand the Company’s Focus
Research the company’s recent projects and innovations in silicon IP. Understanding their focus on AI, graphics, and security will allow you to tailor your responses and show how your skills align with their goals.
✨Prepare for Technical Questions
Expect technical questions related to UVM, simulation tools, and interconnect protocols like AXI or OCP. Brush up on these topics and be ready to explain your thought process when solving verification challenges.
✨Demonstrate Team Collaboration
Since the role involves working closely with architects and design engineers, be ready to discuss your experience in collaborative environments. Share examples of how you’ve effectively communicated and resolved issues within a team setting.