AMS Verification Engineer - 6 months in Farnborough, Hampshire

AMS Verification Engineer - 6 months in Farnborough, Hampshire

Farnborough +1 Full-Time 63000 - 77000 Β£ / year (est.) No working from home possible
M

At a Glance

  • Tasks: Verify RFIC designs and collaborate with engineering teams to ensure high-quality integration.
  • Company: Leading tech firm in RFIC design, fostering innovation and teamwork.
  • Benefits: Competitive pay, hands-on experience, and opportunities for professional growth.
  • Other info: Dynamic work environment with potential for career advancement.
  • Why this job: Join a cutting-edge project and make a real impact in the RFIC industry.
  • Qualifications: 5+ years in RFIC engineering, strong AMS simulation skills, and team collaboration experience.

The predicted salary is between 63000 - 77000 Β£ per year.

Job Specification: AMS Verification Engineer

Location

Farnborough (Onsite)

Contract Duration

6 months

Role Type

  • Contract
  • Inside IR35
  • Job Overview

We are seeking an experienced AMS Verification Engineer to support the verification of complete Receiver (Rx) and Transmitter (Tx) chains for an ongoing RFIC design programme.

The successful candidate will be responsible for setting up and debugging simulation testbenches, verifying designs against specifications, analysing performance results, and validating device register controls for testing.

You will work closely with chip design leads and cross-functional engineering teams to ensure successful integration and delivery of high-quality RFIC designs.

Key Responsibilities

  • Perform verification of complete Rx and Tx signal chains within an RFIC design environment.
  • Review and analyse block-level specifications to define verification requirements.
  • Set up, configure, and debug simulation testbenches.
  • Run AMS simulations and provide detailed reporting against design specifications.
  • Investigate and root cause specification failures and performance issues.
  • Validate device register controls and functionality for testing purposes.
  • Collaborate with chip leads and design engineers to support successful design integration.
  • Present verification results and design performance during block-level design reviews.
  • Document findings, issues, and recommendations throughout the verification process.
  • Required Technical Skills & Experience

Must Have

  • Minimum 5 years experience in RFIC engineering and verification.
  • Strong experience with AMS (Analog Mixed Signal) simulations.
  • Proven experience verifying complete transceiver chains (RF to Analog).
  • Hands-on experience with Verilog-A.
  • Hands-on experience with Verilog-AMS.
  • Experience developing, debugging, and maintaining simulation testbenches.
  • Strong understanding of RFIC design flows and verification methodologies.

Desirable Skills

  • Experience working within semiconductor or wireless communications environments.
  • Strong analytical and problem-solving skills.
  • Ability to communicate technical findings clearly with design and verification teams.
  • Experience supporting design reviews and cross-functional engineering discussions.
  • TPBN1_UKTJ

Locations

FarnboroughHampshire

AMS Verification Engineer - 6 months in Farnborough, Hampshire employer: microTECH Global LTD

Microtech Global Ltd is an exceptional employer, offering a vibrant work culture in the heart of Cambridge, UK, where innovation thrives. Employees benefit from engaging in pioneering projects like OpenTitan and Ibex RISC-V CPU, alongside opportunities for professional growth and collaboration with industry leaders. With a focus on cutting-edge technology and a supportive environment, this role is perfect for those seeking meaningful and rewarding employment in digital design verification.

M

Contact Details:

microTECH Global LTD Recruitment Team

We think you need these skills to ace AMS Verification Engineer - 6 months in Farnborough, Hampshire

AMS Simulations
RFIC Engineering
Verification of Transceiver Chains
Verilog-A
Verilog-AMS
Simulation Testbenches Development
RFIC Design Flows