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For Companies At a Glance
- Tasks: Lead verification of cutting-edge digital designs and mentor fellow engineers.
- Company: Innovative tech company in Cambridge focused on open-source projects.
- Benefits: Competitive salary, flexible working options, and opportunities for professional growth.
- Why this job: Join a dynamic team and make a significant impact in the tech world.
- Qualifications: 8+ years in digital design verification with strong leadership and technical skills.
- Other info: Collaborative environment with exciting projects and career advancement potential.
The predicted salary is between 54000 - 84000 £ per year.
We have an exciting opportunity in Cambridge for a Principal Verification Engineer to lead verification of open-source digital designs, including OpenTitan, RISC-V cores, OTBN, crypto accelerators, and peripherals.
What You’ll Do:
- Lead design, implementation, and debugging of SystemVerilog/UVM testbenches
- Develop verification plans, tests, and coverage strategies
- Mentor engineers and drive best practices
- Collaborate with partners to support successful tapeouts
- Contribute to test and CI infrastructure
Requirements:
- 8+ years in digital design verification with leadership experience
- Strong SystemVerilog/UVM skills
- Full verification lifecycle experience through tapeout
- C and/or Python for test automation
- Git/GitHub and team collaboration experience
Nice to Have:
- Formal verification, RISC-V/ISA experience, security verification, post-silicon debug
Principal Verification Engineer in Cambridge employer: Microtech Global Ltd
Contact Detail:
Microtech Global Ltd Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Principal Verification Engineer in Cambridge
✨Tip Number 1
Network like a pro! Reach out to your connections in the industry, attend meetups, and engage in online forums. You never know who might have the inside scoop on a Principal Verification Engineer role.
✨Tip Number 2
Show off your skills! Create a portfolio showcasing your SystemVerilog/UVM testbenches and any projects you've led. This will give potential employers a taste of what you can bring to the table.
✨Tip Number 3
Prepare for interviews by brushing up on your technical knowledge and leadership experience. Be ready to discuss your verification plans and how you've mentored others in the past.
✨Tip Number 4
Don't forget to apply through our website! We love seeing candidates who are proactive and engaged. Plus, it makes it easier for us to keep track of your application.
We think you need these skills to ace Principal Verification Engineer in Cambridge
Some tips for your application 🫡
Tailor Your CV: Make sure your CV is tailored to the Principal Verification Engineer role. Highlight your experience with SystemVerilog/UVM and any leadership roles you've had. We want to see how your skills match what we're looking for!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you're passionate about digital design verification and how your background makes you a perfect fit for our team. We love hearing your story!
Showcase Your Projects: If you've worked on relevant projects, don't hold back! Include details about your contributions, especially in areas like test automation or collaboration with teams. This helps us see your hands-on experience.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way for us to receive your application and ensures you’re considered for the role. Plus, it’s super easy!
How to prepare for a job interview at Microtech Global Ltd
✨Know Your Stuff
Make sure you brush up on your SystemVerilog and UVM skills. Be ready to discuss specific projects where you've led verification efforts, especially those involving digital designs like RISC-V cores or crypto accelerators. This will show that you not only understand the technical aspects but also have hands-on experience.
✨Prepare for Technical Questions
Expect in-depth questions about the full verification lifecycle and your approach to developing verification plans. Practise explaining your thought process and methodologies clearly, as this will demonstrate your leadership capabilities and technical expertise.
✨Showcase Your Mentoring Skills
Since the role involves mentoring engineers, be prepared to share examples of how you've guided others in the past. Discuss any best practices you've implemented and how you've fostered a collaborative environment in your previous teams.
✨Familiarise Yourself with CI Infrastructure
As you'll be contributing to test and CI infrastructure, it’s crucial to understand how these systems work. Brush up on your knowledge of Git/GitHub and be ready to discuss how you've used these tools in team collaboration and automation processes.
